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參數(shù)資料
| 型號： | TH7804ACC |
| 廠商： | ATMEL CORP |
| 元件分類： | 模擬信號調(diào)理 |
| 英文描述： | 50 AMP LATCHING POWER RELAY |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, CDIP24 |
| 封裝： | WINDOWED, DIP-24 |
| 文件頁數(shù)： | 8/11頁 |
| 文件大?。?/td> | 172K |
| 代理商： | TH7804ACC |
8
TH7804A
1989A
–
IMAGE
–
05/02
Note:
1. Drain supply current I
DD
decreases from 10 mA to 8 mA typically when internal sampling clock is disabled.
Insertion of a serial resistor (typically 100
) at the driver output avoids spurious negative transients.
Table 6.
Selection of Operating Modes
Option
Implementation
Remarks
No Sampling
Φ
ECHA
(2) and
Φ
ECHB
(22) connected to V
DD
S
Φ
ECHA
(3) and S
Φ
ECHB
(21) unconnected
V
INH
(19) connected to V
DD
Sampling clocks connected to
Φ
ECHA
Φ
ECHB
S
Φ
ECHA
and S
Φ
ECHB
unconnected
V
INH
(19) connected to V
DD
Ext.
Φ
RA
on
Φ
RA
(4) input
Ext.
Φ
RB
on
Φ
RB
(18)
(1)
Sampling by External Clocks
see Figure 5 for
sampling clock timing
(1)
Reset Control by External Clocks
see Figure 4 for
reset clock timing
Table 7.
External
Φ
RA
,
Φ
RB
,
Φ
ECHA
,
Φ
ECHB
Clock Characteristics
Parameter
Symbol
Logic
Values
Unit
Min.
Typ.
Max.
External Reset Clock
Φ
RA
,
Φ
RB
Φ
ECHA
,
Φ
ECHB
High
12
12.5
13
V
Sampling Clocks
Low
0.0
0.4
0.6
V
Reset and Sampling Clock
Capacitance
C
Φ
RA
, C
Φ
RB
C
Φ
ECHA
, C
Φ
ECHB
10
15
pF
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PDF描述 |
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| TH7813A | 50 MHz 1024/2048 Linear CCDs |
| TH7813ACC | 50 MHz 1024/2048 Linear CCDs |
| TH7814A | 50 MHz 1024/2048 Linear CCDs |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TH7813A | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:50 MHz 1024/2048 Linear CCDs |
| TH7813ACC | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:50 MHz 1024/2048 Linear CCDs |
| TH7814A | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:50 MHz 1024/2048 Linear CCDs |
| TH7814ACC | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:50 MHz 1024/2048 Linear CCDs |
| TH7815ACC | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:50 MHz 4096 Linear CCDs |
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