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參數資料
| 型號： | TH6503 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | USB Low-Speed Interface |
| 中文描述： | USB低速接口 |
| 文件頁數： | 22/24頁 |
| 文件大?。?/td> | 342K |
| 代理商： | TH6503 |
22
TH6503 USB Low-Speed Interface
Pin Description
Pin Description
USB Interface
1
VBus
I
adjacent 5V bus voltage
5
GND
I
Ground
4
D+
I/O
USB data
3
D-
I/O
USB data
must be connected via 1.5 kOhm resistor to 3.3 V for low speed devices
Microcontroller Interface
13
SCK
I
Serial Clock (generated by microcontroller)
OUT transfer: SDO is accepted by the microcontroller in high status or with falling SCK edge.
The USB bridge shifts the next bit to SDO in low status or with rising edge.
IN Transfer: SDI is accepted by the USB bridge in high status or with falling SCK edge.
The microcontroller shifts the next bit to SDI in low status or with rising edge.
internal pulldown
12
SIN
I
Serial Input Direction (generated by the microcontroller)
specifies the direction of the data transfer and marks the end of a FIFO transfer
SIN = 0: data is sent from the USB bridge to the microcontroller via SDO. An OUT packet sync for the
StatusRegister or CntOutRegister can be triggered via SDI. A rising edge terminates a Status or OUT transfer
and the USB OUT Done status bit is cleared.
SIN = 1: Data is sent from the microcontroller to the USB bridge via SDI. SDO emits an /INT signal. A falling
edge terminates an IN transfer and the EP0 IN Done or EP1/2 IN Done status bit is cleared if the destination
address is a FIFO address.
rising edge indicates the commencement of an IN transfer (IN packet sync). The IN is started once SCK is
pulsed. The Adr/CntInRegister is transferred initially.
internal pulldown
11
SDI
I
Serial Data IN (from the microcontroller to the USB bridge)
generated by the microcontroller
SIN = 0: the falling edge from a single SDI impulse loads the first bit (LSB first) of the StatusRegisters to SDO.
The StatusRegister can be read. Two SDI impulses load the first bit of the CntOutRegister.
SIN = 1: SDI transfers the serial data.
internal pulldown
10
SDO
O
Serial Data Out (from the USB bridge to the microcontroller)
generated by the USB bridge
SIN = 0: SDO show the Status of bit 0 of the StatusRegister (WA) and after a SDI pulse SDO transfers the
serial data.
SIN = 1: SDO is used to generate the /INT signal which can be used to control the microcontroller interrupt
/INT:
- Low active signal to SDO at SIN 1
- is a NOR connection of the RESUME signal, USB reset and an interrupt latch
- Interrupt latch is set for all increases in OUTDone, EP0 IN Done and EP1/2 IN Done edge.
- Interrupt latch is reset, if the StatusRegister is read (SDI impulse at SIN= 0).
15
OCLK
O
Clock out for microcontroller (programmable frequency)
14
/ORST
open
drain
Reset Out (HW- or SW reset)
ORST=0 reset state
ORST=1 normal operation
must be connected with an external pullup resistor (to V3.3)
all resets are indicated on this pin
this type of reset can be determined by evaluating the bits HWR or RES in the StatusRegister <7> or <6>
Reset conditions:
- internal POR
- RESET pin - min. 20μs (31 OCLK cycles at 1.5 MHz) or as long as the RESET pin is active
- Low voltage reset if VBUS<3.3V ± 10% with a minimum of 20 μs (31 OCLK cycles at 1.5 MHz) or as long as
VBUS < 3.3V
- USB-Reset - reduced to 20 μs (31 OCLK cycles at 1.5 MHz), the end of a USB reset is indicated by a rising
edge of /INT and by cleared RES bit in the StatusRegister
Miscellaneous
6
OSC1
I
Oscillator In for a quartz, ceramic resonator or external clock input, 6 MHz ± 1.5%
7
OSC2
O
Oscillator Out
8
WAKE
I
if a specific high trigger level is reached (Schmitt Trigger Characteristic) the USB bridge oscillator is restarted
and
the SO and SMC bit in the BridgeConfigRegister is cleared.
it may be connected to an RC element to achieve restart cycles from 50 to 100 ms
the input signal is compatible with large slew rate
if the SO or SMC bit in the BridgeConfigRegister is set a rising edge on the WAKE pin generates an interrupt
signal on SDO, when SIN = 0
16
/RESET
I
RESET input with Schmitt-Trigger characteristic (internal pullup)
2
V3.3
O
3.3 V output
must be connected with an external capacitor (approx. 10μ)
9
TEST
I
Test pin, internal pulled up (do not connect to external circuitry)
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