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| 型號： | TFDT6502E-TR3 |
| 廠商： | VISHAY SEMICONDUCTORS |
| 元件分類： | 其它接口 |
| 英文描述： | SPECIALTY INTERFACE CIRCUIT, XMA8 |
| 封裝： | 13 X 7.60 X 5.95 MM, TOP VIEW-8 |
| 文件頁數(shù)： | 16/18頁 |
| 文件大?。?/td> | 690K |
| 代理商： | TFDT6502E-TR3 |
TFDU6102E/TFDS6402/TFDS6502E/TFDT6502E
Vishay Semiconductor
Rev. B1.6, 02–Nov–00
7
www.vishay.com
Document Number 82526
OptoelectronicCharacteristics (continued)
Tamb = 25_C, VCC = 2.6 V to 5.5 V unless otherwise noted.
Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
Parameters
Test Conditions
Symbol
Min.
Typ.
Max.
Unit
Transmitter
IRED Operating Current
R1*) = 7.2
, VCC = 5.0 V
ID
0.4
0.55
A
Output Radiant Intensity
(see Figure 3)
VCC = 5.0 V, α = 0_, 15_
Txd = High, SD = Low, R1 = 7.2
Ie
120
170
350
mW/sr
Output Radiant Intensity
VCC = 5.0 V, α = 0_, 15_
Txd = Low, SD = High,
(Receiver is inactive as long as
SD = High) R1 = 7.2
Ie
0.04
mW/sr
Output Radiant Intensity,
Angle of Half Intensity
a
±24
°
Peak – Emission
Wavelength
lP
880
900
nm
Optical Output Pulse
Duration
Input pulse width 217 ns,
1.152 Mbit/s
topt
207
217
227
ns
Duration
Input pulse width 125 ns,
4 Mbit/s
topt
117
125
133
ns
Input pulse width 250 ns,
4 Mbit/s
topt
242
250
258
ns
Input pulse width t < 80
s
Input pulse width t
≥ 80 s
topt
t
80
s
Optical Rise Time,
Fall Time
tropt,
tfopt
10
40
ns
Optical Overshoot
10
%
*)
R1: control series resistor for current limitation
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