參數(shù)資料
型號: TDGL002
廠商: Microchip Technology
文件頁數(shù): 142/214頁
文件大小: 0K
描述: BOARD DEV CHIPKIT UNO32
標(biāo)準(zhǔn)包裝: 1
系列: PIC® 32MX
類型: MCU
適用于相關(guān)產(chǎn)品: MPLAB?,Arduino? Uno
所含物品:
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2011 Microchip Technology Inc.
DS61143H-page 33
PIC32MX3XX/4XX
2.5
ICSP Pins
The PGECx and PGEDx pins are used for In-Circuit
Serial Programming (ICSP) and debugging pur-
poses. It is recommended to keep the trace length
between the ICSP connector and the ICSP pins on the
device as short as possible. If the ICSP connector is
expected to experience an ESD event, a series resistor
is recommended, with the value in the range of a few
tens of Ohms, not to exceed 100 Ohms.
Pull-up resistors, series diodes and capacitors on the
PGECx and PGEDx pins are not recommended as they
will interfere with the programmer/debugger communi-
cations to the device. If such discrete components are
an application requirement, they should be removed
from the circuit during programming and debugging.
Alternately, refer to the AC/DC characteristics and tim-
ing requirements information in the respective device
Flash programming specification for information on
capacitive loading limits and pin input voltage high (VIH)
and input low (VIL) requirements.
Ensure that the “Communication Channel Select” (i.e.,
PGECx/PGEDx pins) programmed into the device
matches the physical connections for the ICSP to
MPLAB ICD 2, MPLAB ICD 3 or MPLAB REAL ICE.
For more information on ICD 2, ICD 3 and REAL ICE
connection
requirements,
refer
to
the
following
documents that are available on the Microchip web
site.
“MPLAB ICD 2 In-Circuit Debugger User’s
Guide” DS51331
“Using MPLAB ICD 2” (poster) DS51265
“MPLAB ICD 2 Design Advisory” DS51566
“Using MPLAB ICD 3” (poster) DS51765
“MPLAB ICD 3 Design Advisory” DS51764
“MPLAB REAL ICE In-Circuit Debugger
User’s Guide” DS51616
“Using MPLAB REAL ICE” (poster) DS51749
2.6
JTAG
The TMS, TDO, TDI and TCK pins are used for testing
and debugging according to the Joint Test Action
Group (JTAG) standard. It is recommended to keep the
trace length between the JTAG connector and the
JTAG pins on the device as short as possible. If the
JTAG connector is expected to experience an ESD
event, a series resistor is recommended, with the value
in the range of a few tens of Ohms, not to exceed 100
Ohms.
Pull-up resistors, series diodes and capacitors on the
TMS, TDO, TDI and TCK pins are not recommended
as they will interfere with the programmer/debugger
communications to the device. If such discrete compo-
nents are an application requirement, they should be
removed from the circuit during programming and
debugging. Alternately, refer to the AC/DC characteris-
tics and timing requirements information in the respec-
tive device Flash programming specification for
information on capacitive loading limits and pin input
voltage high (VIH) and input low (VIL) requirements.
2.7
Trace
The trace pins can be connected to a hardware-trace-
enabled programmer to provide a compress real time
instruction trace. When used for trace the TRD3,
TRD2, TRD1, TRD0 and TRCLK pins should be dedi-
cated for this use. The trace hardware requires a 22
Ohm series resistor between the trace pins and the
trace connector.
2.8
External Oscillator Pins
Many MCUs have options for at least two oscillators: a
high-frequency primary oscillator and a low-frequency
secondary oscillator (refer to Section 8.0 “Oscillator
Configuration” for details).
The oscillator circuit should be placed on the same
side of the board as the device. Also, place the
oscillator circuit close to the respective oscillator pins,
not
exceeding
one-half
inch
(12 mm)
distance
between them. The load capacitors should be placed
next to the oscillator itself, on the same side of the
board. Use a grounded copper pour around the
oscillator circuit to isolate them from surrounding
circuits. The grounded copper pour should be routed
directly to the MCU ground. Do not run any signal
traces or power traces inside the ground pour. Also, if
using a two-sided board, avoid any traces on the
other side of the board where the crystal is placed. A
suggested layout is illustrated in Figure 2-3.
FIGURE 2-3:
SUGGESTED PLACEMENT
OF THE OSCILLATOR
CIRCUIT
Main Oscillator
Guard Ring
Guard Trace
Secondary
Oscillator
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