參數(shù)資料
型號: TDA9965AHL
廠商: NXP SEMICONDUCTORS
元件分類: 消費家電
英文描述: 12-bit, 5.0 V, 40 Msps analog-to-digital interface for CCD cameras
中文描述: SPECIALTY CONSUMER CIRCUIT, PQFP48
封裝: 7 X 7 MM, 1.40 MM HEIGHT, SOT-313-2, MS-026, PLASTIC, LQFP-48
文件頁數(shù): 8/22頁
文件大?。?/td> 136K
代理商: TDA9965AHL
2004 Jul 05
8
Philips Semiconductors
Product specification
12-bit, 5.0 V, 40 Msps analog-to-digital
interface for CCD cameras
TDA9965A
t
W(SHD)
SHD pulse width
V
i(IN)
= 1000 mV;
transition (98.5%) in 1 pixel;
code f
co(CTH)
= 0000;
see Fig.5
code f
co(CTH)
0000
0001
0010
0100
1000
1111
see Fig.5
8
ns
7
12
16
22
32
49
3
ns
ns
ns
ns
ns
ns
ns
t
h(IN-SHP)
CTH input hold time
compared to control pulse
SHP
CTH input hold time
compared to control pulse
SHD
t
h(IN-SHD)
see Fig.5
3
ns
Programmable Gain Amplifier (PGA) output: pin PGAOUT
V
PGAOUT(p-p)
PGA output amplifier
dynamic voltage level
(peak-to-peak value)
PGAoutputamplifierblack
level voltage
PGA output amplifier
output impedance
PGA output current drive
minimum gain of PGA
circuit
maximum gain of PGA
circuit
2000
mV
V
PGAOUT(b)
code C
(CLP)
= 0
1.475
V
Z
PGAOUT
f
pix
at 10 kHz for minimum
and maximum values
static
code G
PGA
= 0
5
I
PGAOUT
G
PGA(min)
0
1
mA
dB
G
PGA(max)
code G
PGA
767
36
dB
Analog-to-Digital Converter (ADC)
f
pix(max)
t
W(CLKADC)H
maximum pixel frequency
CLKADC pulse width
HIGH
40
11
MHz
ns
V
i(IN)
= 1000 mV;
transition (99.5%) in 1 pixel;
code f
co(CTH)
= 0000;
code G
PGA
= 128; see Fig.5
V
i(IN)
= 1000 mV;
transition (99.5%) in 1 pixel;
code f
co(CTH)
= 0000;
code G
PGA
= 128
rising and falling edges;
10% to 90%
with internal regulator
t
W(CLKADC)L
CLKADC pulse width
LOW
11
ns
SR
CLKADC
CLKADC input slew rate
0.5
V/ns
V
i(ADCIN)(p-p)
ADC input voltage
(peak-to-peak value)
2
V
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
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