參數(shù)資料
型號: TDA9910HW/8/C1
廠商: NXP SEMICONDUCTORS
元件分類: ADC
英文描述: 1-CH 12-BIT RESISTANCE LADDER ADC, PARALLEL ACCESS, PQFP48
封裝: 7 X 7 MM, 1 MM HEIGHT, PLASTIC, SOT545-2, MS-026, HTQFP-48
文件頁數(shù): 1/21頁
文件大?。?/td> 128K
代理商: TDA9910HW/8/C1
1.
General description
The TDA9910 is a 12-bit Analog-to-Digital Converter (ADC) optimized for direct Input
Frequency (IF) sampling, and supporting the most demanding use conditions in ultra high
IF radio transceivers for cellular infrastructure and other applications such as wireless
access system, optical networking and xed telecommunication. Thanks to its broadband
input capabilities, the TDA9910 is ideal for single and multiple carriers data conversion.
Operating at a maximum sampling rate of 80 Msample/s, analog input signals are
converted into 12-bit binary coded digital words. All static digital inputs are CMOS
compatible. All output signals are LVCMOS compatible. The TDA9910 offers the most
possible exible acquisition control system thanks to its programmable Complete
Conversion Signal (CCS) that allows to adjust the delay of the acquisition clock.
Thanks to its internal front-end buffer, the TDA9910 offers the lowest input capacitance
(< 1 pF) and therefore the highest exibility in front-end aliasing lter strategy.
2.
Features
3.
Applications
I 2.5G and 3G cellular base infrastructure radio transceivers
I Wireless access systems
I Fixed telecommunication
I Optical networking
I Wireless Local Area Network (WLAN) infrastructure
TDA9910
12-bit, up to 80 Msample/s, Analog-to-Digital Converter (ADC)
direct/ultra high IF sampling
Rev. 04 — 12 June 2007
Product data sheet
I 12-bit resolution
I Differential input with 375 MHz bandwidth
I 90 dB SFDR; 71 dB SNR (fi = 225 MHz;
fCLK = 80 Msample/s; B = 5 MHz)
I 70 dB SFDR; 66.5 dB SNR (fi = 175 MHz;
fCLK = 80 Msample/s; B = Nyquist)
I High-speed sampling rate up to 80 Msample/s
I Internal front-end buffer (input capacitance <1 pF)
I Programmable acquisition output clock (complete
conversion signal)
I Full-scale controllable from 1.5 V to 2 V (p-p);
continuous scale
I Single 5 V power supply
I 3.3 V LVCMOS compatible digital outputs
I Binary or two’s-complement LVCMOS outputs
I CMOS compatible static digital inputs
I Only 2 clock cycles latency
I Industrial temperature range from 40 °C to +85 °C
I HTQFP48 package
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