參數(shù)資料
型號: TDA9852H
廠商: NXP SEMICONDUCTORS
元件分類: 消費(fèi)家電
英文描述: I2C-bus controlled BTSC stereo/SAP decoder and audio processor
中文描述: SPECIALTY CONSUMER CIRCUIT, PQFP44
文件頁數(shù): 17/40頁
文件大小: 258K
代理商: TDA9852H
1997 Mar 11
17
Philips Semiconductors
Preliminary specification
I
2
C-bus controlled BTSC stereo/SAP
decoder and audio processor
TDA9852
Automatic volume level control (AVL)
Z
i
V
i(rms)
input impedance
maximum input voltage
(RMS value)
gain, maximum boost
maximum attenuation
equivalent step width between
the input stages
(soft switching system)
input level at maximum boost
(RMS value)
input level at maximum
attenuation (RMS value)
output level in AVL operation
(RMS value)
DC offset between different
gain steps
8.8
2
11.0
tbf
13.2
k
V
THD < 0.2%
G
v
5
14
6
15
1.5
7
16
dB
dB
dB
G
step
V
iop(rms)
0.1
V
1.125
V
V
o(rms)
see Fig.5
160
200
250
mV
V
DC OFF
voltage at pin C
AV
6.50 to 6.33 V or
6.33 to 6.11 V or
6.11 to 5.33 V or
5.33 to 2.60 V; note 6
AT1 = 0; AT2 = 0; note 7
AT1 = 1; AT2 = 0; note 7
AT1 = 0; AT2 = 1; note 7
AT1 = 1; AT2 = 1; note 7
normal mode; CCD = 0; note 8 1.6
power-
on
speed-up; CCD = 1;
note 8
6
mV
R
att
discharge resistors for attack
time constant
340
590
0.96
1.7
420
730
1.2
2.1
2.0
tbf
520
910
1.5
2.6
2.4
k
k
μ
A
μ
A
I
dec
charge current for decay time
Selector from pins LOL, LOR, LIL and LIR to pins SOL and SOR
Z
i
α
s
input impedance
input isolation of one selected
source to the other input
16
86
80
2
20
96
96
2.3
24
k
dB
dB
V
V
i
= 1 V; f
i
= 1 kHz
V
i
= 1 V; f
i
= 12.5 kHz
THD < 0.5%
V
i(rms)
maximum input voltage
(RMS value)
DC offset voltage at selector
output by selection of any
inputs
output impedance
output load resistance
output load capacitance
voltage gain, selector
V
DC OFF
25
mV
Z
o
R
L
C
L
G
v
5
0
80
0
120
2.5
k
nF
dB
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
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