參數(shù)資料
型號: TDA8841
廠商: NXP Semiconductors N.V.
英文描述: I2C-bus controlled PAL/NTSC/SECAM TV processors
中文描述: I2C總線控制的PAL / NTSC制式/ SECAM電視處理器
文件頁數(shù): 32/68頁
文件大小: 316K
代理商: TDA8841
December 16, 1997
32
Philips Semiconductors
Tentative Device Specification
I
2
C-bus controlled PAL/NTSC/SECAM TV
processors
TDA884X/5X-N2 series
CVBS, Y/C, RGB, CD AND LUMINANCE OUT- AND INPUTS
CVBS-Y/C
SWITCH
,
PINS
10, 11, 13, 17
AND
38 (20, 21, 24, 26, 29
AND
54
FOR
TDA 885X)
S.1.1
CVBS or Y input voltage
(peak-to-peak value)
CVBS or Y input current
suppression of non-selected
CVBS input signal
chrominance input voltage
(burst amplitude)
chrominance input impedance
output signal amplitude
(CVBS1) (peak-to-peak value)
black level of CVBS1
output signal amplitude
(CVBS2) (peak-to-peak value)
black level of CVBS2
output impedance
note 22
1.0
1.4
V
S.1.2
S.1.3
50
4
μ
A
dB
notes 5 and 23
S.1.4
note 2 and 24
0.3
1.0
V
S.1.5
S.1.6
50
2.0
k
V
S.1.7
S.1.8
2.1
1.0
V
V
S.1.9
S.1.10
3.3
250
V
RGB
INPUTS
,
PINS
23
TO
25 (35
TO
37
AND
41
TO
43
FOR
TDA 885X)
S.2.1
input signal amplitude for an
output signal of 2 V
(black-to-white) (peak-to-peak
value)
input signal amplitude before
clipping occurs (peak-to-peak
value)
difference between black level
of internal and external signals
at the outputs
input currents
delay difference for the three
channels
note 25
0.7
0.8
V
S.2.2
note 5
1.0
V
S.2.3
20
mV
S.2.4
S.2.5
no clamping; note 2
note 5
0.1
0
1
20
μ
A
ns
F
AST BLANKING
,
PIN
26 (38
AND
44
FOR
TDA 885X)
S.3.1
S.3.2
S.3.3
S.3.4
input voltage
no data insertion
data insertion
insertion
data insertion; note 5
0.9
0.6
0.4
3.0
60
V
V
V
ns
maximum input pulse
delay time from RGB in to
RGB out
delay difference between
insertion to RGB out and
RGB in to RGB out
input current
suppression of internal RGB
signals
S.3.5
data insertion; note 5
20
ns
S.3.6
S.3.7
55
0.2
mA
dB
notes 5 and 23; insertion;
f
i
= 0 to 5 MHz
NUMBER
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
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