參數(shù)資料
型號(hào): TDA8792M-T
廠商: NXP SEMICONDUCTORS
元件分類: ADC
英文描述: 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO24
封裝: 5.30 MM, PLASTIC, MO-150AG, SOT-340-1, SSOP-24
文件頁(yè)數(shù): 12/20頁(yè)
文件大?。?/td> 104K
代理商: TDA8792M-T
1996 Feb 21
2
Philips Semiconductors
Product specication
3.3 V, 25 MHz 8-bit
analog-to-digital converter (ADC)
TDA8792
FEATURES
8-bit resolution
Sampling rate up to 25 MHz
30 MHz input signal bandwidth (full scale)
High signal-to-noise ratio over a large analog input
frequency range (7.3 effective bits at 4.43 MHz
full-scale input at fclk = 25 MHz)
CMOS compatible digital inputs
External reference voltage regulator
Power dissipation only 53 mW (typical)
Standby mode (only 1.2 mW typical)
Low analog input capacitance, no buffer amplifier
required
No sample-and-hold circuit required.
APPLICATIONS
Analog-to-digital conversion for:
General purpose
Hand-held equipment
Mobile telecommunication
Instrumentation
Video.
GENERAL DESCRIPTION
The TDA8792 is a 8-bit analog-to-digital converter (ADC)
for low-voltage, portable applications. It operates at 3.3 V
and converts the analog input signal into 8-bit
binary-coded digital words at a maximum sampling rate of
25 MHz. The output data is valid after a delay of 6 clock
cycles.
QUICK REFERENCE DATA
ORDERING INFORMATION
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
VDDA
analog supply voltage
2.85
3.3
3.6
V
VDDD
digital supply voltage
2.70
3.3
3.6
V
VDDO
output stages supply voltage
2.5
3.3
3.6
V
IDDA
analog supply current
12
20
mA
IDDD
digital supply current
36mA
IDDO
output stages supply current
fclk = 25 MHz; CL = 15 pF;
ramp input
12mA
INL
integral non-linearity
fclk = 25 MHz; ramp input
±0.4
±0.8
LSB
DNL
differential non-linearity
fclk = 25 MHz; ramp input
±0.3
±0.75
LSB
fclk(max)
maximum clock frequency
25
MHz
Ptot
total power dissipation
fclk = 25 MHz; CL = 15 pF;
ramp input
53
100
mW
TYPE
NUMBER
PACKAGE
NAME
DESCRIPTION
VERSION
TDA8792M
SSOP24
plastic shrink small outline package; 24 leads; body width 5.3 mm
SOT340-1
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