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參數(shù)資料
| 型號(hào)： | TDA8768AH/4 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | ADC |
| 英文描述： | 1-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP44 |
| 封裝： | 10 X 10 MM, 1.75 MM HEIGHT, PLASTIC, SOT-307-2, QFP-44 |
| 文件頁數(shù)： | 4/32頁 |
| 文件大小： | 1434K |
| 代理商： | TDA8768AH/4 |
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Philips Semiconductors
TDA8768A
12-bit, 70 Msps Analog-to-Digital Converter (ADC)
Product data
Rev. 02 — 03 July 2002
12 of 32
9397 750 09656
Koninklijke Philips Electronics N.V. 2002. All rights reserved.
[1]
Twos complement reference is inverted MSB.
[1]
X = don’t care.
Table 7:
Output coding with differential inputs (typical values to AGND);
Vi(p-p) Vi(p-p) = 1.9 V, Vref =VCCA3 1.75 V
Code
Vi(p-p)
IR
Binary outputs
Twos complement
D11 to D0
Underow
<3.125
>4.075
0
0 0 0 0 0 0 0 0 0 0 0 0
1 0 0 0 0 0 0 0 0 0 0 0
0
3.125
4.075
1
0 0 0 0 0 0 0 0 0 0 0 0
1 0 0 0 0 0 0 0 0 0 0 0
1
1
0 0 0 0 0 0 0 0 0 0 0 1
1 0 0 0 0 0 0 0 0 0 0 1
↓
↓
2047
3.6
1
0 1 1 1 1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1 1 1 1 1
↓
↓
4094
1
1 1 1 1 1 1 1 1 1 1 1 0
0 1 1 1 1 1 1 1 1 1 1 0
4095
4.075
3.125
1
1 1 1 1 1 1 1 1 1 1 1 1
0 1 1 1 1 1 1 1 1 1 1 1
Overow
>4.075
<3.125
0
1 1 1 1 1 1 1 1 1 1 1 1
0 1 1 1 1 1 1 1 1 1 1 1
Table 8:
Mode selection
OTC
CE
D0 to D11 and IR
0
binary; active
1
0
twos complement; active
1
high-impedance
Table 9:
Sample-and-hold selection
SH
Sample-and-hold
1
active
0
inactive; tracking mode
Fig 3.
Timing diagram.
ds
t
sample N + 1
sample N
CLK
MBG855
sample N + 2
V
l
DATA
D0 to D11
t d
t h
tCLKL
tCLKH
HIGH
LOW
50 %
HIGH
LOW
50 %
DATA
N
+ 1
DATA
N
DATA
N
1
DATA
N
2
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