
1998 Jun 23
7
Philips Semiconductors
Product specication
I2C-bus programmable modulator for
negative video modulation and FM sound
TDA8722
Table 1
Data format; notes 1 and 2
Notes
1. The 10 programmable bits of N are: b2 to b11.
2. Internal hardware sets: b1 = 0 and b0 = 1.
3. T0, T1 and T2 are bits used for test purposes (see Table 5).
4. P0 is a bit used for controlling the state of the output Port (see Table 6).
Table 2
Structure of the dividing number N
Notes
1. Bits b2 to b11 are programmable and represent the integer part of the frequency in MHz. Bits b1 and b0 are fixed
internally to b1 = 0 and b0 = 1 to get the added 0.25 MHz, common for most TV channels.
2. Bits b1 and b0 are not programmable.
3. fosc = 512b11 + 256b10 + 128b9 + 64b8 + 32b7 + 16b6 + 8b5 + 4b4 + 2b3 + b2 + 0.25 (MHz).
Table 3
Dividing number N for programming channel 21 (471.25 MHz)
Notes
1. Bits b1 and b0 are not programmable.
2. fosc =0+256 +128 +64+0+16+0+4+2+1+ 0.25 (MHz) = 471.25 MHz.
Table 4
Content of the data bytes to program channel 21 (471.25 MHz)
It is possible to change only one data byte. The circuit will recognize which one is received with the value of MSB
(0 for data byte 1 and 1 for data byte 2). It is possible to change the frequency by 1 MHz with data byte 2. It is easy to
increment the channel frequency when its frequency width is 8 MHz by simply incrementing data byte 1.
BYTE
BIT 7
MSB
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
LSB
ACKNOWLEDGE BIT
Address byte C8
1
0
1
0
ACK
Data byte 1
0
b11
b10
b9
b8
b7
b6
b5
ACK
Data byte 2
1
T0(3)
T1(3)
T2(3)
P0(4)
b4
b3
b2
ACK
RESULT
BITS(1)
b11
b10
b9
b8
b7
b6
b5
b4
b3
b2
b1(2)
b0(2)
Frequency (MHz)(3)
512
256
128
64
32
16
8421
0.5
0.25
RESULT
BITS
b11
b10
b9
b8
b7
b6
b5
b4
b3
b2
b1(1)
b0(1)
Value
011101011101
Frequency (MHz)(2)
0
256
128
64
0
16
04210
0.25
BYTE
BIT 7
MSB
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
LSB
ACKNOWLEDGE BIT
Address byte C8
1
0
1
0
ACK
Data byte 1
0
1
0
1
0
ACK
Data byte 2
1
0
1
ACK