參數(shù)資料
型號: TDA8707H
廠商: NXP SEMICONDUCTORS
元件分類: ADC
英文描述: Triple RGB 6-bit video analog-to-digital interface
中文描述: TRIPLE 1-CH 6-BIT FLASH METHOD ADC, PARALLEL ACCESS, PQFP44
封裝: 10 X 10 MM, 1.75 MM HEIGHT, PLASTIC, SOT-307-2, QFP-44
文件頁數(shù): 7/16頁
文件大?。?/td> 97K
代理商: TDA8707H
1996 Feb 01
7
Philips Semiconductors
Product specification
Triple RGB 6-bit video analog-to-digital
interface
TDA8707
I
NPUT ISOLATION
α
ct
crosstalk between INR, ING and INB
40
dB
Outputs (R0 to R5: pins 38 and 40 to 44; G0 to G5: pins 3 to 8; B0 to B5: pins 14 to 16 and 18 to 20)
V
OL
V
OH
LOW level output voltage
HIGH level output voltage
0
4.0
0.5
V
DDD
V
V
Switching characteristics
C
LOCK INPUT
CLK (see Fig.3)
f
clk(max)
t
CPH
t
CPL
maximum clock frequency
clock pulse width HIGH
clock pulse width LOW
35
10
12
MHz
ns
ns
Analog signal processing (50% clock duty cycle) f
clk
= 35 MHz
L
INEARITY
INL
DNL
integral non-linearity
differential non-linearity
ramp input; T
amb
= 25
°
C
ramp input; T
amb
= 25
°
C
±
0.35
±
0.35
±
0.6
±
0.6
LSB
LSB
B
ANDWIDTH
(see Fig.5 and note 7)
3 dB analog bandwidth
t
STLH
analog input settling time LOW-to-HIGH full scale square wave
t
STHL
analog input settling time HIGH-to-LOW full scale square wave
H
ARMONICS
; note 6
B
9
13
11
16
14
MHz
ns
ns
f
1
f
all
E
FFECTIVE BITS
fundamental harmonic
harmonics, all components
37
0
dB
dB
EB
effective bits
f
i
= 4.43 MHz
5.3
bits
D
IFFERENTIAL GAIN
; note 5
G
diff
D
IFFERENTIAL PHASE
; note 5
diff
differential phase
differential gain
PAL modulated ramp
3
%
PAL modulated ramp
2
deg
Timing
(see Figs 3 and 4)
t
dS
t
h
t
d
t
r
t
f
t
CLP
sampling delay time
output hold time
output delay time
clock rise time
clock fall time
active clamping duration
6
3
3
3
3
5
5
4
16
ns
ns
ns
ns
ns
μ
s
note 8
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
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