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參數(shù)資料
| 型號： | TDA7502 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | IN-CAR REMOTE AMPLIFIER DSP |
| 中文描述： | 中，車遙控功放的DSP |
| 文件頁數(shù)： | 3/8頁 |
| 文件大?。?/td> | 58K |
| 代理商： | TDA7502 |
N.
Name
Type
Reset
Status
I
–
–
I
Function
7
8
9
DBOUT/GPIO2
VDD2
GND2
DBCK/GPIO0
I/O
I
I
I/O
The serial data output for the Debug Port. Can also be used as a GPIO.
3.3V core supply.
Core ground.
Debug Port Bit Clock/Chip Status 1. The serial clock for the Debug Port
is provided when an input. When an output, provides information about
the chip status. Can also be used as GPIO
Debug Port Serial Input/Chip Status 0. The serial data input for the
Debug Port is provided when an input. When an output, provides
information about the chip status. Can also be used as GPIO.
Output Clock.
PLL Clock GroundInput. Ground connection for oscillator circuit.
PLL Clock Power Supply. Positive supply for PLL Clock Oscillator.
Crystal Oscillator Output. Crystal Oscillator output drive.
Crystal Oscillator Input. External Clock Input or crystal connection.
System Reset. A logic low level applied to RESET input initializes DSPs.
During DebugMode if this pin is pulled low in while the DBRQN line is
pulled low then the DSP pointed to by the DBSEL pin will be reset.
3.3V Supply.
Ground.
SDI0 isa stereo digital audio data input pin channel 0.
SDI1 isa stereo digital audio data input pin channel 1.
SDI2 isa stereo digital audio data input pin channel 2.
SAI receive bit clock. Master or slave.
Left-Right clock for SAI Receiver. Master or slave.
3.3V Supply.
Ground.
SDO0isa stereodigital audio dataoutput pinchannel 0.
SDO1isa stereodigital audio dataoutput pinchannel 1.
SDO2isa stereodigital audio datapin channel 2.
3.3V Supply.
Ground.
SAI transmit left/right clock. Master or slave.
SAI transmit bit clock. Master or slave.
Clock line for I
2
C bus. Schmitt triggerinput.
Data line for I
2
C bus. Schmitt trigger input.
Bit clock for SPI control interface.
Slave select input pin for SPI control interface.
Serial Data Output for SPI type serial port when in SPI Master Mode and
Serial Data Input when in SPI Slave Mode.
Serial Data Input for SPI style serial port when in SPI Master Mode and
Serial Data Output when inSPI Slave Mode.
3.3V Supply.
Ground.
This pin is dedicated as general I/O.
This pin is dedicated as general I/O.
This pin is dedicated as general I/O.
10
11
DBIN/GPIO1
I/O
I
12
13
14
15
16
17
CLKOUT
PGND
PVCC
XTO
XTI
RESET
O
I
I
O
I
I/O
–
–
–
High
–
I
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
VDD3
GND3
SDI0
SDI1
SDI2
SCKR
LRCKR
VDD4
GND4
SDO0
SDO1
SDO2
VDD5
GND5
LRCKT
SCKT
SCL
SDA
SCK
SS
MOSI
I
I
I
I
I
–
–
–
–
–
–
–
–
–
I/O
I/O
I
I
O
O
O
GND
I
I/O
I/O
I/O
I/O
I
I
I/O
High
High
High
–
–
–
–
–
–
–
–
I
39
MISO
I/O
I
40
41
42
43
44
VDD6
GND6
GPIO3
GPIO4
GPIO5
GND
I
I/O
I/O
I/O
–
–
–
–
–
PIN DESCRIPTION
(continued)
TDA7502
3/8
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