參數(shù)資料
型號: TDA7476
廠商: 意法半導(dǎo)體
英文描述: CAR RADIO DIAGNOSTIC PROCESSOR
中文描述: 汽車無線電診斷處理器
文件頁數(shù): 8/15頁
文件大?。?/td> 101K
代理商: TDA7476
I
2
C BUS INTERFACE
Data transmission from microprocessor to the
TDA7476 and viceversa takes place through the
2 wires I
2
C BUS interface, consisting of the two
lines SDA and SCL (pull-up resistors to positive
supply voltage must be connected).
Data Validity
As shown by fig. 2, the data on the SDA line must
be stable during the high period of the clock. The
HIGH and LOW state of the data line can only
change when the clock signal on the SCL line is
LOW.
Start and Stop Conditions
As shown by fig. 3 a start condition is a HIGH to
LOW transition of the SDA line while SCL is
HIGH. The stop condition is a LOW to HIGH tran-
sition of the SDA line while SCL is HIGH.
Byte Format
Every byte transferred to the SDA line must con-
tain 8 bits. Each byte must be followed by an ac-
knowledgebit. The MSB is transferredfirst.
Acknowledge
The transmitter* puts a resistive HIGH level on the
SDA line during the acknowledge clock pulse (see
fig.4).The receiver** the acknowledgeshas to pull-
down (LOW) the SDA line duringthe acknowledge
clock pulse, so thatthe SDAline is stableLOW dur-
ingthisclockpulse.
* Transmitter
= master (
μ
P) when it writes an address to
the TDA7476
= slave (TDA7476) when the
μ
P reads a
data byte from TDA7476
** Receiver
= slave (TDA7476) when the
μ
P writes an
addressto the TDA7476
= master (
μ
P) when it reads a databyte from
TDA7476
Figure 2:
Data Validityon theI
2
CBUS
Figure 3:
TimingDiagram on the I
2
CBUS
Figure 4:
Acknowledgeon the I
2
CBUS
TDA7476
8/15
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