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參數(shù)資料
| 型號： | TDA7439B |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | THREE BANDS DIGITALLY CONTROLLED AUDIO PROCESSOR |
| 中文描述： | 三頻段數(shù)字控制音頻處理器 |
| 文件頁數(shù)： | 9/19頁 |
| 文件大?。?/td> | 167K |
| 代理商： | TDA7439B |
9/19
TDA7439
Figure 15.
5
SOFTWARE SPECIFICATION
5.1 Interface Protocol
The interface protocol comprises:
■
A start condition (S)
■
A chip address byte, containing the TDA7439 address
■
A subaddress bytes
■
A sequence of data (N byte + acknowledge)
■
A stop condition (P)
Figure 16.
ACK = Acknowledge
S = Start
P = Stop
A = Address
B = Auto Increment
6
EXAMPLES
6.1 No Incremental Bus
The TDA7439 receives a start condition, the correct chip address, a subaddress with the B = 0 (no incre-
mental bus), N-data (all these data concern the subaddress selected), a stop condition.
Figure 17.
SCL
1
MSB
2
3
7
8
9
SDA
START
ACKNOWLEDGMENT
FROM RECEIVER
D99AU1033
S
1
0
0
0
1
0
0
0
ACK
ACK
DATA
ACK
P
MSB
LSB
MSB
LSB
MSB
LSB
CHIP ADDRESS
D96AU420
X
DATA
SUBADDRESS
DATA 1 to DATA n
X
X
B
S
1
0
0
0
1
0
0
0
ACK
ACK
DATA
ACK
P
MSB
LSB
MSB
LSB
MSB
LSB
CHIP ADDRESS
D96AU421
X
D3
SUBADDRESS
DATA
X
X
0
D2 D1 D0
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