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參數(shù)資料
| 型號： | TDA7421N |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 接收器 |
| 英文描述： | AM/FM, AUDIO SINGLE CHIP RECEIVER, PQFP64 |
| 封裝： | TQFP-64 |
| 文件頁數(shù)： | 19/47頁 |
| 文件大?。?/td> | 374K |
| 代理商： | TDA7421N |
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I2C bus interface
TDA7421N
5
I2C bus interface
5.1
General description
The TDA7421N supports the I2C bus protocol. This protocol defines the devices sending
data into the bus as transmitter and the receiving device as the receiver.
The device that controls the transfer is a master and the device being controlled is the slave.
The master will always initiates data transfer and provide the clock to transmit or receive
operations.
5.2
Data transition
Data transition on the SDA line must only occur when the clock SCL is low. SDA transitions
while SCL is high will be interpreted as START or STOP condition.
Start condition
A start condition is defined by a HIGH to LOW transition of the SDA line while SCL is at a
stable HIGH level. This START condition must precede any command and initiate a data
transfer onto the bus.The TDA7421N continuously monitors the SDA and SCL lines for a
valid START and will not response to any command if this condition has not been met.
5.3
Stop condition
A STOP condition is defined by a LOW to HIGH transition of the SDA while the SCL line is at
a stable HIGH level. This condition terminate the communication between the devices and
force's the bus interface of the TDA7421N into the initial condition.
Figure 8.
Phase comparator
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