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參數(shù)資料
| 型號： | TDA7346 |
| 廠商： | 意法半導體 |
| 英文描述： | Digitally Controlled Surround Sound Matrix(數(shù)控環(huán)繞聲矩陣) |
| 中文描述： | 數(shù)控矩陣環(huán)繞聲（數(shù)控環(huán)繞聲矩陣） |
| 文件頁數(shù)： | 6/14頁 |
| 文件大?。?/td> | 122K |
| 代理商： | TDA7346 |
I
2
C BUSINTERFACE
Data transmission from microprocessor to the
TDA7346 and viceversa takes place through the
2 wires I
2
C BUS interface, consisting of the two
lines SDA and SCL (pull-up resistors to positive
supply voltage must be connected).
Data Validity
As shown in fig. 3, the data on the SDA line must
be stable during the high period of the clock. The
HIGH and LOW state of the data line can only
change when the clock signal on the SCL line is
LOW.
Start and Stop Conditions
As shown in fig.4 a start condition is a HIGH to
LOW transition of the SDA line while SCL is
HIGH. The stop conditionis a LOW to HIGH tran-
sition of the SDAline while SCL is HIGH.
Byte Format
Every byte transferred on the SDA line must con-
tain 8 bits. Each byte must be followed by an ac-
knowledge bit.The MSB is transferred first.
Acknowledge
The master (
μ
P) putsa resistive HIGH levelon the
SDA line during the acknowledge clock pulse (see
fig. 5). The peripheral (audioprocessor) that ac-
knowledges has to pull-down (LOW) the SDA line
during the acknowledge clock pulse, so that the
SDAlineis stableLOWduringthisclock pulse.
The audioprocessor which has been addressed
has to generate an acknowledge after the recep-
tion of each byte, otherwise the SDA line remains
at the HIGH level during the ninth clock pulse
time. In this case the master transmitter can gen-
erate the STOP information in order to abort the
transfer.
Transmissionwithout Acknowledge
Avoiding to detect the acknowledge of the audio-
processor,the
μ
P can usea simpler transmission:
simply it waits one clock without checking the
slave acknowledging,and sends the new data.
This approach of course is less protected from
misworking and decreasesthe noise immunity.
Figure 3:
Data Validityon theI
2
CBUS
Figure 4:
TimingDiagram of I
2
CBUS
Figure 5:
Acknowledgeon the I
2
CBUS
TDA7346
6/14
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