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參數(shù)資料
| 型號(hào)： | TDA7340P |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | AUDIO SIGNAL PROCESSOR |
| 中文描述： | 音頻信號(hào)處理器 |
| 文件頁(yè)數(shù)： | 9/16頁(yè) |
| 文件大?。?/td> | 115K |
| 代理商： | TDA7340P |
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NOTES TO THE CHARACTERISTICS
(continued)
5. Controlrange typ 11% of V
R
(see figure2)
6. Controlrange typ 30% of V
R
(see figure1)
Figure 1:
High Cut Control
-0.4
-0.3
-0.2
-0.1
VSB-VR(V)
D94AU056
0
10
20
30
40
50
SEP
(dB)
VR=3.6V
Figure2:
Stereo Blend
I
2
C BUS INTERFACE
Interface Protocol
The interfaceprotocol comprises:
A startcondition (s)
A chip addressbyte, (the LSB bit determines
read/writetransmission).
A subaddressbyte
A sequenceof data (N-bytes + acknowledge)
A stopcondition (P)
ACK = Acknowledge
S = Start
P = Stop
I = Autoincrement
MAXCLOCK SPEED 500kbits/s
Autoincrement
If bit I in the subaddressbyte is set to ”1”, the autoincrementof subaddressis enabled.
VTH
VMPX
DC-LEVEL
TR
THIGH
TF
Time
D94AU185
Figure 3
(*) All thresholds are measured by using a pulse with T
R
= 2
μ
s,
T
= 2
μ
s and T
= 10
μ
s.
The repetition rate must not increase the PEAK voltage.
S
1
0
0
0
1
0
0
R/W
ACK
I
ACK
DATA
ACK
P
MSB
LSB
MSB
LSB
MSB
LSB
CHIP ADDRESS
D95AU216
X
X
T
A
3
A
2
A
1
A
0
SUBADDRESS
DATA 1 ... DATA n
TDA7340
9/16
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