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參數(shù)資料
| 型號： | TDA4663T |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費家電 |
| 英文描述： | Baseband delay line |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PDSO16 |
| 封裝： | 3.90 MM, PLASTIC, SOT-109-1, MS-012AC, SO-16 |
| 文件頁數(shù)： | 6/12頁 |
| 文件大小： | 69K |
| 代理商： | TDA4663T |
1996 Nov 22
6
Philips Semiconductors
Product specification
Baseband delay line
TDA4663T
Notes
1.
2.
Noise voltage at f = 10 kHz to 1 MHz; R
S
< 300
.
The leading edge of the burst-key pulse or H-blanking pulse is used for timing.
α
ct(16, 11)
crosstalk direct from input to output
signal
supply voltage ripple rejection
V
11, 12
/V
R
V
14
= 0 V; R
S
= 300
;
V
16
= 1.35 V (p-p)
V
R
= 100 mV (p-p);
f
R
= 10 Hz to 1 kHz;
V
11, 12
= 1.35 V (p-p)
V
14
= V
16
= 0 V;
R
S
= 300
V
14
= V
16
= 0 V;
active video;
R
S
= 300
30
dB
SVRR
34
dB
V
11, 12(p-p)
clamping offset during H-clamp
(peak-to-peak value)
unwanted signals (line-locked)
(peak-to-peak value)
residual clock (3 MHz)
meander
needles
line delay time
5
mV
V
11, 12(p-p)
64
0.125 64
0.055 64 + 0.015
μ
s
63.555
0.125
0.055
6.25
1.5
2.5
mV
mV
mV
t
d
for PAL signals
for NTSC signals
63.555
63.555 +
0.015
μ
s
Sandcastle pulse input (pin 5)
f
BK
burst-key frequency/sandcastle
frequency
V
5
top pulse voltage
t
BK
top pulse duration
V
slice
internal slicing level
I
i
input current
C
i
input capacitance
t
li
lock-in time for PLL
Clamping pulse input (pin 7)
V
clamp
clamping pulse ON
clamping pulse OFF
I
i
input current
C
i
input capacitance
t
clamp
clamping pulse duration
t
r
rise time
t
f
fall time
14.2
15.625
17.0
kHz
note 2
4.0
V
5
1.0
2.5
V
P
+ 1.0
V
5
0.5
10
10
1
V
μ
s
V
μ
A
pF
ms
3.5
0.5
0.1
10
10
V
P
0.1
+0.1
2
V
P
+1.5
10
10
3
V
V
μ
A
pF
μ
s
ns
ns
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
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