
TD230
7/15
Do
no
t u
se
for
new
design
figure 1 C
ISS will therefore simply be replaced by
C
ISS + CSS 1/2.
Figure 1 : Dual Electronic Circuit Breaker
Application
If the fault (over current condition) still remains af-
ter the reconduction state of the MOSFET
1/2 has
been reached, the current through NMOS
1/2 will
overpass the limitation given by equation (i), and
the NMOS
1/2 will
immediately be switched off
again.
Figure 2 shows the current limitation which is op-
erated on every restart attempt.
Figure 2 : TD230 as Current Limitor
Trace A represents the Gate-Source Voltage of
the Power Mosfet (0 to 13,4V).
Trace B represents the voltage across the Sense
Resistor (68m
) in direct relation with the current
through it (0 to ~1A).
Note that the first current peak which is due to an
over current is limited only by the reaction time of
the TD230.
This off time is tied to the value of the external soft
start capacitor C
SS 1/2 by equation (iii) :
u t
OFF = RDSON x CSS (iii)
While in current limitation mode, the NMOS
1/2 dis-
sipates low power due to the fact that the ON/OFF
cycle time rate is very low.
Note that the higher the value of C
SS1/2 are, the
more the NMOS
1/2 will stay in linear mode during
current limitation.
Note that at Power ON, or in the case of live inser-
tion, the inrush current is automatically limited
thanks to the slow gate charge of the MOSFET
which switches ON softly due to the time constant
given in equation (ii).
2.2. Fault Time Limitation
The repetitive switching off of the MOSFET will
come to an end under two conditions :
u either the fault has disappeared, and the
current through the shunt resistors RS 1/2
has come back to its nominal value : the
system keeps running normally.
External line defaults (lightning, line breakage,
etc...) are usual causes for such temporary over
currents.
u either the repetitive switching off has lasted
over an externally adjustable time and the
TD230 has definitively switched off the cor-
responding NMOS : the system waits to be
reset.
Equipment faults (component short circuit, over
heat, etc ...) are usual causes for lasting over cur-
rents.
This fault time supervision is done by the compar-
ison of the output voltage to 75% of the nominal
supply voltage. As soon as the output voltage is
detected under 0.75xVcc(+/-), the corresponding
external capacitors C
TRIP1/2 is charged by a fixed
current source IP/N2 - IP/N3 (3A). When the voltage
across CTRIP1/2 reaches 1.20V, the corresponding
NMOS is definitively switched off and the SHUT-
DOWN pin is active low.
To avoid cumulative charging of the protection ca-
pacitors C
TRIP 1/2 in case of successive overcurrent
1
2
3
4
5
6
7
9
10
11
12
13
14
8
15
16
PVcc
LBOOST
CBOOST
PM1
GND
PM2
OSCGND
NVcc
REF1
GC1
SENSP
INHIBIT
SHUTDOWN
SENSN
GC2
REF2
Vcc+
GND
Vcc-
LBOOST
CTRIP1
CTRIP2
RS2
NMos
to BOARD
CSS1
CONTROL
NMOS
from BOARD
CSS2
RS1
CBOOST