
TC9495F
2002-01-11
5
Pin No.
Symbol
I/O
Functional Description
Remarks
55
DMO
O
Disk equalizer output terminal.
(PWM carrier
= 88.2 kHz for DSP, Synchronize to PXO)
56
2VREF
Analog double reference voltage supply terminal.
57
SEL
O
APC circuit ON/OFF indication signal output terminal.
At the laser on time, UHF
= L at “HiZ” level and UHF = H at
“H” level.
58
FLGA
O
Extemal flag output terminal for internal signal.
Can select signal from TEZC, FOON , FOK and RFZC by
command.
59
FLGB
O
Extemal flag output terminal for internal signal.
Can select signal from DFCT , FOON , FMON and RFZC
by command.
60
FLGC
O
Extemal flag output terminal for internal signal.
Can select signal from TRON , TRSR , FOK and SRCH
by command.
61
FLGD
O
Extemal flag output terminal for internal signal.
Can select signal from TRON , DMON , HYS and SHC
by command.
62
VDD
Digital power supply voltage terminal.
63
VSS
Digital GND terminal.
64
IO0
65
IO1
66
IO2
67
IO3
I/O
General I/O terminal. Can change over input port or output
port by command. At the input mode time can readout a
state of terminal (H/L) by read command. At the output mode
time can control a state of terminal (H/L/HiZ) by command.
68
DMOUT
I
This terminal controls IO0~IO3 terminal.
At “L” level time, IO0, 1 out feed equalizer signal of 2-state
PWM, IO2, 3 out disk equalizer signal of 2-state PWM.
With pull-up resistor.
69
CKSE
I
Normally, keep at open.
With pull-up resistor.
70
DACT
I
DAC test mode terminal. Normally, keep at open.
With pull-up resistor.
71
TESIN
I
Test input terminal. Normally, keep at “L” level.
Analog input.
72
TESIO1
I
Test input/output terminal. Normally, keep at “L” level.
73
VSS
Digital GND terminal.
74
PXI
I
Crystal oscillator connecting input terminal for DSP.
Normally, keep at “L” level.
75
PXO
O
Crystal oscillator connecting output terminal for DSP.
Analog input.
76
VDD
Digital power supply voltage terminal.
77
XVSS
Oscillator GND terminal for system clock.
78
XI
I
Crystal oscillator connecting input terminal for system clock.
79
XO
O
Crystal oscillator connecting output terminal for system clock.
80
XVDD
Oscillator power supply voltage terminal for system clock.
81
DVSR
Analog GND terminal for DA converter. (R-ch)
82
RO
O
R channel data forward output terminal.
83
DVDD
Analog supply voltage terminal for DA converter.
84
DVR
Reference voltage terminal for DA converter.
85
LO
O
L channel data forward output terminal.
86
DVSL
Analog GND terminal for DA converter. (L-ch)
87
TEST1
I
Test mode terminal. Normal, keep at open.
With pull-up resistor.