參數(shù)資料
型號(hào): TC9205M-DS-R02
廠商: Electronic Theatre Controls, Inc.
元件分類: 圓形連接器
英文描述: Circular Connector; No. of Contacts:2; Series:; Body Material:Aluminum; Connector Shell Size:8; Circular Contact Gender:Socket; Circular Shell Style:Straight Plug; Insert Arrangement:8-2
中文描述: 5端口10/100/1000智能以太網(wǎng)交換機(jī)
文件頁數(shù): 13/51頁
文件大?。?/td> 1661K
代理商: TC9205M-DS-R02
TC9205M
Preliminary Data Sheet
Pin Listing
(continued)
No.
U18 RxData4_6
U19 RxData4_7
D14 Vdd 3.3
E19 FullBp
Pin label
Type
I
s
I
s
P
I
pd
Description
GMII receive data - most significant nibble
GMII receive data - most significant nibble
Digital +3.3V power supply for I/O
In normal operation the backpressure process is executed until flow
control condition disappears or until the time limit for backpressure is
reached. This limit is based on EEPROM’s
BPTimeValue
register.
When this configuration is ‘0’ the backpressure process will be also
limited from exceeding 28 consecutive collisions. The default value
(28) can be changed by EEPROM settings.
FullBp is latched on reset
Enable / disable carrier based backpressure for half -duplex mode.
'1' – Carrier based backpressure
‘0' – Collision based backpressure.
CarrBp is latched on reset
Setting this pin to ‘1’ will disable backpressure procedure for all half
duplex ports. DisBkPr is latched on reset.
I/O
pd
Transmit Error
MII transmit data - bit 3
I/O
pd
Setting this bit to ‘1’ will force flow control execution for 10/100Mbps,
no matter the auto negotiation result. FrcFdFc is latched on reset.
G
Digital ground for I/O
MII transmit data - bit 2
I/O
pd
Setting this bit to '1' will disable flow-control for full-duplex mode
(transmission of pause frames).
DisFdFc is latched on reset.
I/
pd
MII transmit data - bit 1
I/
pd
MII transmit data - least significant bit
MII transmit enable
I/O
pd
Enable / disable backoff during backpressure.
'1' – No backoff executed. Another collision will be forced again after
one minimum IFG time following previous collision if carrier sense
is observed.
'0' – The MAC randomly chooses between 0 and 1 slot times of backoff.
DisBkBp is latched on reset.
I
s
Receive Error
P
Digital +2.0V power supply for core
I
MII transmit clock
G
Digital ground for core
I
MII receive clock
I
s
MII/MII data valid
I
s
MII carrier sense indication
I
s
MII collision indication
I
s
MII receive data - least significant nibble.
MII receive data
E20 CarrBp
I
pu
F18 DisBkPr
I
pd
E17 TxEr5
TxData5_3
F20
FrcFdFc
D10 Vss 3.3
TxData5_2
G20
DisFdFc
G19 TxData5_1
G18 TxData5_0
TxEn5
E18
DisBPBk
H19 RxEr5
D13 Vdd 2.0
H18 Txclk5
D12 Vss 2.0
J17 RxClk5
H20 RxDv5
M20 Crs5
M19 Col5
L20 RxData5_0
Confidential.
Copyright
2003, IC Plus Corp.
13/51
July 30, 2003
TC9205M-DS-R03
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