參數(shù)資料
型號(hào): TC7MH367FK
廠商: Toshiba Corporation
英文描述: TC7MH367FK Non-Inverted, 3-State Outputs TC7MH368FK Inverted, 3-State Outputs
中文描述: TC7MH367FK不倒,三態(tài)輸出TC7MH368FK倒,三態(tài)輸出
文件頁(yè)數(shù): 1/8頁(yè)
文件大?。?/td> 151K
代理商: TC7MH367FK
TC7MH367,368FK
2001-10-23
1
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC7MH367FK,TC7MH368FK
HEX Bus Buffer
TC7MH367FK Non-Inverted, 3-State Outputs
TC7MH368FK Inverted, 3-State Outputs
The TC7MH367FK and TC7MH368FK are advanced high
speed CMOS HEX bus buffers fabricated with silicon gate
C
2
MOS technology.
They achieve the high speed operation similar to equivalent
bipolar schottky TTL while maintaining the CMOS low power
dissipation.
They contain six buffers; four buffers are controlled by an
enable input (G1), and the other two buffers are controlled by
another enable input (G2). The outputs of each buffer group are
enabled when G1 and/or G2 inputs are held low; if held high,
these outputs are in a high impedance state.
The TC7MH367FK is a non-inverting output type, while the TC7MH368FK is an inverting output type.
An input protection circuit ensures that 0 to 7 V can be applied to the input pins without regard to the supply
voltage. This device can be used to interface 5 V to 3 V systems and two supply systems such as battery back up.
This circuit prevents device destruction due to mismatched supply and input voltages.
Features
High speed: t
pd
= 3.8 ns (typ.) (V
CC
= 5 V)
Low power dissipation: I
CC
= 4 μA (max) (Ta = 25°C)
High noise immunity: V
NIH
= V
NIL
= 28% V
CC
(min)
Power down protection is provided on all inputs.
Balanced propagation delays: t
pLH
t
pHL
Wide operating voltage range: V
CC (opr)
= 2~5.5 V
Low noise: V
OLP
= 0.8 V (max)
Pin and function compatible with 74ALS367/368
Weight: 0.02 g (typ.)
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