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參數(shù)資料
| 型號(hào)： | TC7660MJAG |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | SWITCHED CAPACITOR REGULATOR, 10 kHz SWITCHING FREQ-MAX, CDIP8 |
| 封裝： | CERDIP-8 |
| 文件頁(yè)數(shù)： | 17/18頁(yè) |
| 文件大小： | 396K |
| 代理商： | TC7660MJAG |
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TC7660
DS21465B-page 8
2002 Microchip Technology Inc.
5.4
Changing the TC7660 Oscillator
Frequency
The operating frequency of the TC7660 can be
changed in order to optimize the system performance.
The frequency can be increased by over-driving the
OSC input (Figure 5-4). Any CMOS logic gate can be
utilized in conjunction with a 1 k
series resistor. The
resistor is required to prevent device latch-up. While
TTL level signals can be utilized, an additional 10 k
pull-up resistor to V+ is required. Transitions occur on
the rising edge of the clock input. The resultant output
voltage ripple frequency is one half the clock input.
Higher clock frequencies allow for the use of smaller
pump and reservoir capacitors for a given output volt-
age ripple and droop. Additionally, this allows the
TC7660 to be synchronized to an external clock, elimi-
nating undesirable beat frequencies.
At light loads, lowering the oscillator frequency can
increase the efficiency of the TC7660 (Figure 5-5). By
lowering the oscillator frequency, the switching losses
are reduced. Refer to Figure 2-3 to determine the typi-
cal operating frequency based on the value of the
external capacitor. At lower operating frequencies, it
may be necessary to increase the values of the pump
and reservoir capacitors in order to maintain the
desired output voltage ripple and output impedance.
FIGURE 5-4:
External Clocking.
FIGURE 5-5:
Lowering Oscillator
Frequency.
5.5
Positive Voltage Multiplication
Positive voltage multiplication can be obtained by
employing two external diodes (Figure 5-6). Refer to
the theory of operation of the TC7660 (Section 4.1).
During the half cycle when switch S2 is closed, capaci-
V+ - VF1, where VF1 is the forward voltage drop of diode
D1. During the next half cycle, switch S1 is closed, shift-
ing the reference of capacitor C1 from GND to V+. The
energy in capacitor C1 is transferred to capacitor C2
through diode D2, producing an output voltage of
approximately:
EQUATION
FIGURE 5-6:
Positive Voltage Multiplier.
5.6
Combined Negative Voltage
Conversion and Positive Supply
Multiplication
Simultaneous voltage inversion and positive voltage
multiplication can be obtained (Figure 5-7). Capacitors
C1 and C3 perform the voltage inversion, while capaci-
tors C2 and C4, plus the two diodes, perform the posi-
tive voltage multiplication. Capacitors C1 and C2 are
the pump capacitors, while capacitors C3 and C4 are
the reservoir capacitors for their respective functions.
Both functions utilize the same switches of the TC7660.
As a result, if either output is loaded, both outputs will
drop towards GND.
CMOS
GATE
1k
VOUT
“1”
+
V+
+
1
2
3
4
8
7
6
5
TC7660
10 F
V+
VOUT
+
1
2
3
4
8
7
6
5
TC7660
C1
C2
V+
COSC
VOUT
2V
+
×
VF1 VF2
+
()
–
=
where:
VF1 is the forward voltage drop of diode D1
and
VF2 is the forward voltage drop of diode D2.
+
C2
D1
D2
+
C1
VOUT =
1
2
3
4
8
7
6
5
TC7660
V+
(2 V+) - (2 VF)
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