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參數(shù)資料
| 型號(hào)： | TC74VHCT374AFK |
| 廠商： | Toshiba Corporation |
| 英文描述： | Octal D-Type Flip Flop with 3-State Output |
| 中文描述： | 八路D類(lèi)拖鞋具有三態(tài)輸出 |
| 文件頁(yè)數(shù)： | 5/9頁(yè) |
| 文件大?。?/td> | 235K |
| 代理商： | TC74VHCT374AFK |
TC74VHCT374AF/AFT/AFK
2007-10-01
5
AC Characteristics
(input: t
r
= t
f
= 3 ns)
Test Condition
Ta = 25°C
Ta =
40 to 85°C
Characteristics
Symbol
V
CC
(V)
C
L
(pF)
Min
Typ.
Max
Min
Max
Unit
15
―
4.1
9.4
1.0
10.5
Propagation delay
time
(CK-Q)
t
pLH
t
pHL
―
5.0 ± 0.5
50
―
5.6
10.4
1.0
11.5
ns
15
―
6.5
10.2
1.0
11.5
3-state output enable
time
t
pZL
t
pZH
R
L
= 1 k
5.0 ± 0.5
50
―
7.3
11.2
1.0
12.5
ns
3-state output disable
time
t
pLZ
t
pHZ
R
L
= 1 k
5.0 ± 0.5
50
―
7.0
11.2
1.0
12.0
ns
15
90
140
―
80
―
Maximum clock
frequency
f
max
―
5.0 ± 0.5
50
85
130
―
95
―
MHz
Output to output skew
t
osLH
t
osHL
(Note 1)
5.0 ± 0.5
50
―
―
1.0
―
1.0
ns
Input capacitance
C
IN
―
―
4
10
―
10
pF
Output capacitance
C
OUT
―
―
9
―
―
―
pF
Power dissipation
capacitance
C
PD
(Note 2)
―
25
―
―
―
pF
Note 1: Parameter guaranteed by design.
t
osLH
= |t
pLHm
t
pLHn
|, t
osHL
= |t
pHLm
t
pHLn
|
Note 2: C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the operating
current consumption without load.
Average operating current can be obtained by the equation:
I
CC (opr)
= C
PD
·V
CC
·f
IN
+ I
CC
/8 (per F/F)
And the total C
PD
when n pcs. of latch operate can be gained by the following equation:
C
PD
(total) = 14 + 11·n
Noise Characteristics
(input: t
r
= t
f
= 3 ns)
Test Condition
Ta = 25°C
Characteristics
Symbol
V
CC
(V)
Typ.
Max
Unit
Quiet output maximum dynamic V
OL
V
OLP
C
L
= 50 pF
5.0
1.1
1.5
V
Quiet output minimum dynamic V
OL
V
OLV
C
L
= 50 pF
5.0
1.1
1.5
V
Minimum high level dynamic input voltage
V
IHD
C
L
= 50 pF
5.0
―
2.0
V
Maximum low level dynamic input voltage
V
ILD
C
L
= 50 pF
5.0
―
0.8
V
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