參數(shù)資料
型號: TC74VHCT08AFK
廠商: Toshiba Corporation
英文描述: Quad 2-Input AND Gate
中文描述: 四2輸入與門
文件頁數(shù): 1/9頁
文件大?。?/td> 250K
代理商: TC74VHCT08AFK
TC74VHCT08AF/AFN/AFT/AFK
2007-10-01
1
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74VHCT08AF,TC74VHCT08AFN,TC74VHCT08AFT,TC74VHCT08AFK
Quad 2-Input AND Gate
The TC74VHCT08A is an advanced high speed CMOS
2-INPUT AND GATE fabricated with silicon gate C
2
MOS
technology.
It achieves the high speed operation similar to equivalent
Bipolar Schottky TTL while maintaining the CMOS low power
dissipation.
The input voltage are compatible with TTL output voltage.
This device may be used as a level converter for interfacing 3.3
V to 5 V system.
Input protection and output circuit ensure that 0 to 5.5 V can
be applied to the input and output
(Note)
pins without regard to
the supply voltage. These structure prevents device destruction
due to mismatched supply and input/output voltages such as
battery back up, hot board insertion, etc.
Note:
V
CC
=
0 V
Features
High speed: t
pd
=
5.0 ns (typ.) at V
CC
=
5 V
Low power dissipation: I
CC
=
2
μ
A (max) at Ta
=
25°C
Compatible with TTL outputs: V
IL
=
0.8 V (max)
Power down protection is provided on all inputs and outputs.
Balanced propagation delays: t
pLH
t
pHL
Low noise: V
OLP
=
0.8 V (max)
Pin and function compatible with the 74 series
(74AC/HC/F/ALS/LS etc.) 08 type.
V
IH
=
2.0 V (min)
Weight
SOP14-P-300-1.27A
SOL14-P-150-1.27
TSSOP14-P-0044-0.65A
VSSOP14-P-0030-0.50
: 0.18 g (typ.)
: 0.12 g (typ.)
: 0.06 g (typ.)
: 0.02 g (typ.)
Note: xxxFN (JEDEC SOP) is not available in
Japan.
TC74VHCT08AF
TC74VHCT08AFN
TC74VHCT08AFT
TC74VHCT08AFK
相關PDF資料
PDF描述
TC74VHCT08AF QUAD 2-INPUT AND GATE
TC74VHCT08AFN QUAD 2-INPUT AND GATE
TC74VHCT08AFT QUAD 2-INPUT AND GATE
TC74VHCT125AFK Quad Bus Buffer
TC74VHCT126AFK Quad Bus Buffer
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