參數(shù)資料
型號(hào)： TC74ACT640FW
廠商： Toshiba Corporation
英文描述： OCTAL BUS TRANSCEIVER
中文描述： 八進(jìn)制總線收發(fā)器
文件頁(yè)數(shù)： 1/11頁(yè)
文件大小： 198K
代理商： TC74ACT640FW
TC51WHM516AXBN65,70
2002-08-22 1/11
Access Times:
TC51WHM516AXBN
65
70
Access Time
65 ns
70 ns
CE1
Access Time
65 ns
70 ns
OE
Access Time
25 ns
25 ns
Page Access Time
30 ns
30 ns
Package:
P-TFBGA48-0607-0.75AZ (Weight: g typ.)
TENTATIVE
TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
2,097,152-WORD BY 16-BIT CMOS PSEUDO STATIC RAM
DESCRIPTION
The TC51WHM516AXBN is a 33,554,432-bit pseudo static random access memory(PSRAM) organized as
2,097,152 words by 16 bits. Using Toshiba’s CMOS technology and advanced circuit techniques, it provides high
density, high speed and low power. The device operates single power supply. The device also features SRAM-like
W/R timing whereby the device is controlled by CE1,OE , and WE on asynchronous. The device has the page
access operation. Page size is 8 words. The device also supports deep power-down mode, realizing low-power
standby.
FEATURES
Organized as 2,097,152 words by 16 bits
Single power supply voltage of 2.6 to 3.3 V
Direct TTL compatibility for all inputs and outputs
Deep power-down mode: Memory cell data invalid
Page operation mode:
Page read operation by 8 words
Logic compatible with SRAM R/W ( WE) pin
Standby current
Standby
Deep power-down standby
70
μ
A
5
μ
A
PIN ASSIGNMENT
(TOP VIEW)
PIN NAMES
1
2
3
4
5
6
A
LB
OE
A0
A1
A2
CE2
B
I/O9
UB
A3
A4
CE1
I/O1
C
I/O10 I/O11
A5
A6
I/O2
I/O3
D
VSS
I/O12
A17
A7
I/O4
VDD
E
VDD I/O13
NC
A16
I/O5
VSS
F
I/O15 I/O14
A14
A15
I/O6
I/O7
G
I/O16
A19
A12
A13
WE
I/O8
H
A18
A8
A9
A10
A11
A20
(FBGA48)
A0 to A20
Address Inputs
A0 to A2
Page Address Inputs
I/O1 to I/O16 Data Inputs/Outputs
CE1
Chip Enable Input
CE2
Chip select Input
WE
Write Enable Input
OE
Output Enable Input
LB ,
UB
Data Byte Control Inputs
V
DD
GND
Power
Ground
NC
No Connection
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