參數(shù)資料
型號: TC74ACT245FT
廠商: Toshiba Corporation
英文描述: OCTAL BUS TRANSCEIVER
中文描述: 八進制總線收發(fā)器
文件頁數(shù): 4/11頁
文件大小: 198K
代理商: TC74ACT245FT
TC51WHM516AXBN65,70
2002-08-22 4/11
AC CHARACTERISTICS AND OPERATING CONDITIONS
(Ta
=
25°C to 85°C, V
DD
=
2.6 to 3.3 V) (See Note 5 to 11)
TC51WHM516AXBN
65
70
SYMBOL
PARAMETER
MIN
MAX
MIN
MAX
UNIT
t
RC
t
ACC
Read Cycle Time
65
10000
70
10000
ns
Address Access Time
65
70
ns
t
CO
Chip Enable (
CE1
) Access Time
65
70
ns
t
OE
Output Enable Access Time
25
25
ns
t
BA
Data Byte Control Access Time
25
25
ns
t
COE
Chip Enable Low to Output Active
10
10
ns
t
OEE
Output Enable Low to Output Active
0
0
ns
t
BE
Data Byte Control Low to Output Active
0
0
ns
t
OD
t
ODO
Chip Enable High to Output High-Z
20
20
ns
Output Enable High to Output High-Z
20
20
ns
t
BD
Data Byte Control High to Output High-Z
20
20
ns
t
OH
Output Data Hold Time
10
10
ns
t
PM
Page Mode Time
65
10000
70
10000
ns
t
PC
Page Mode Cycle Time
30
30
ns
t
AA
Page Mode Address Access Time
30
30
ns
t
AOH
Page Mode Output Data Hold Time
10
10
ns
t
WC
Write Cycle Time
65
10000
70
10000
ns
t
WP
Write Pulse Width
50
50
ns
t
CW
Chip Enable to End of Write
65
70
ns
t
BW
Data Byte Control to End of Write
60
60
ns
t
AW
t
AS
Address Valid to End of Write
60
60
ns
Address Set-up Time
0
0
ns
t
WR
Write Recovery Time
0
0
ns
t
ODW
WE Low to Output High-Z
20
20
ns
t
OEW
WE High to Output Active
0
0
ns
t
DS
Data Set-up Time
30
30
ns
t
DH
Data Hold Time
0
0
ns
t
CS
CE2 Set-up Time
0
0
ns
t
CH
CE2 Hold Time
300
300
μ
s
t
DPD
CE2 Pulse Width
10
10
ms
t
CHC
CE2 Hold from
CE1
0
0
ns
t
CHP
CE2 Hold from Power On
30
30
μ
s
AC TEST CONDITIONS
PARAMETER
CONDITION
Output load
30 pF
+
1 TTL Gate
Input pulse level
V
DD
0.2 V, 0.2 V
Timing measurements
V
DD
×
0.5
Reference level
V
DD
×
0.5
t
R
, t
F
5 ns
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