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參數(shù)資料
| 型號： | TC7126IPL |
| 廠商： | TelCom Semiconductor, Inc. |
| 英文描述： | 3-1/2 DIGIT ANALOG-TO-DIGITAL CONVERTERS |
| 中文描述： | 3-1/2數(shù)字模擬數(shù)字轉(zhuǎn)換器 |
| 文件頁數(shù)： | 9/13頁 |
| 文件大小： | 198K |
| 代理商： | TC7126IPL |
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TELCOM SEMICONDUCTOR, INC.
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3-1/2 DIGIT
ANALOG-TO-DIGITAL CONVERTERS
TC7126
TC7126A
In some applications, a scale factor other than unity may
exist between a transducer output voltage and the required
digital reading. Assume, for example, a pressure transducer
output for 2000 lb/in.
2
is 400 mV. Rather than dividing the
Required Full-Scale Voltage*
V
REF
100 mV
1V
200 mV
2V
*V
FS
= 2 V
REF
.
input voltage by two, the reference voltage should be set to
200 mV. This permits the transducer input to be used
directly.
The differential reference can also be used where a
digital zero reading is required when V
IN
is not equal to zero.
This is common in temperature-measuring instrumentation.
A compensating offset voltage can be applied between
analog common and V
IN–
. The transducer output is con-
nected between V
IN+
and analog common.
DEVICE PIN FUNCTIONAL DESCRIPTION
(Pin Numbers Refer to 40-Pin DIP)
Differential Signal Inputs
V
IN+
(Pin 31), V
IN–
(Pin 30)
The TC7126A is designed with true differential inputs
and accepts input signals within the input stage common-
mode voltage range (V
CM
). Typical range is V
+
–1V to V
–
+1V. Common-mode voltages are removed from the system
when the TC7126A operates from a battery or floating power
source (isolated from measured system), and V
IN–
is con-
nected to analog common (V
COM
). (See Figure 5.)
In systems where common-mode voltages exist, the
TC7126A's 86 dB common-mode rejection ratio minimizes
error. Common-mode voltages do, however, affect the inte-
grator output level. A worst-case condition exists if a large
positive V
CM
exists in conjunction with a full-scale negative
differential signal. The negative signal drives the integrator
output positive along with V
CM
(see Figure 6.) For such
applications, the integrator output swing can be reduced
below the recommended 2V full-scale swing. The integrator
output will swing within 0.3V of V
+
or V
–
without increased
linearity error.
Differential Reference
V
REF+
(Pin 36), V
REF–
(Pin 35)
The reference voltage can be generated anywhere
within the V
+
to V
–
power supply range.
To prevent roll-over type errors being induced by large
common-mode voltages, C
REF
should be large compared to
stray node capacitance.
The TC7126A offers a significantly improved analog
common temperature coefficient. This potential provides a
very stable voltage, suitable for use as a voltage reference.
The temperature coefficient of analog common is typically
35 ppm/
°
C for the TC7126A and 80 ppm/
°
C for the TC7126.
ANALOG COMMON (Pin 32)
The analog common pin is set at a voltage potential
approximately 3V below V
+
. The potential is guaranteed to
be between 2.7V and 3.35V below V
+
. Analog common is
tied internally to an N-channel FET capable of sinking
Integrating Resistor
(R
INT
)
The input buffer amplifier and integrator are designed
with Class A output stages. The output stage idling current
is 6
μ
A. The integrator and buffer can supply 1
μ
A drive
current with negligible linearity errors. R
INT
is chosen to
remain in the output stage linear drive region, but not so
large that PC board leakage currents induce errors. For a
200 mV full scale, R
INT
is 180 k
. A 2V full scale requires
1.8 M
.
Oscillator Components
C
OSC
should be 50 pF; R
OSC
is selected from the
equation:
0.45
RC
f
OSC
=
.
For a 48 kHz clock (3 conversions per second), R = 180 k
.
Note that f
OSC
is
4
4 to generate the TC7126A's inter-
nal clock. The backplane drive signal is derived by dividing
f
OSC
by 800.
To achieve maximum rejection of 60 Hz noise pickup,
the signal integrate period should be a multiple of 60 Hz.
Oscillator frequencies of 240 kHz, 120 kHz, 80 kHz, 60 kHz,
40 kHz, etc. should be selected. For 50 Hz rejection,
oscillator frequencies of 200 kHz, 100 kHz, 66-2/3 kHz, 50
kHz, 40 kHz, etc. would be suitable. Note that 40 kHz (2.5
readings per second) will reject both 50 Hz and 60 Hz.
Reference Voltage Selection
A full-scale reading (2000 counts) requires the input
signal be twice the reference voltage.
Component Nominal Full-Scale Voltage
Value
200 mV
2V
C
AZ
R
INT
C
INT
NOTE:
0.33
μ
F
180 k
0.047
μ
F
0.033
μ
F
1.8 M
0.047
μ
F
f
OSC
= 48 kHz (3 readings per sec).
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