參數資料
型號: TC7106ACLW
廠商: TelCom Semiconductor, Inc.
元件分類: 串行ADC
英文描述: 3-1/2 DIGIT A/D CONVERTERS
中文描述: 3-1/2位數的A / D轉換器
文件頁數: 11/19頁
文件大?。?/td> 296K
代理商: TC7106ACLW
3-193
TELCOM SEMICONDUCTOR, INC.
7
6
5
4
3
1
2
8
Oscillator Components
R
OSC
(Pin 40 to Pin 39) should be 100k
. C
OSC
is
selected using the equation:
For f
OSC
of 48kHz, C
OSC
is 100pF nominally.
Note that f
OSC
is divided by four to generate the TC7106A
internal control clock. The backplane drive signal is derived
by dividing f
OSC
by 800.
To achieve maximum rejection of 60Hz noise pickup,
the signal-integrate period should be a multiple of 60Hz.
Oscillator frequencies of 240kHz, 120kHz, 80kHz, 60kHz,
48kHz, 40kHz, etc. should be selected. For 50 Hz rejection,
oscillator frequencies of 200kHz, 100kHz, 66 2/3kHz, 50kHz,
40kHz, etc. would be suitable. Note that 40kHz (2.5 read-
ings/second) will reject both 50Hz and 60Hz.
Reference Voltage Selection
A full-scale reading (2000 counts) requires the input
signal be twice the reference voltage.
Required Full-Scale Voltage*
V
REF
100.0mV
1.000V
200.0mV
2.000V
* V
FS
= 2 V
REF
In some applications a scale factor other than unity may
exist between a transducer output voltage and the required
digital reading. Assume, for example, a pressure transducer
output is 400mV for 2000 lb/in
2
. Rather than dividing the
input voltage by two the reference voltage should be set to
200mV. This permits the transducer input to be used
directly.
The differential reference can also be used when a
digital zero reading is required when V
IN
is not equal to zero.
This is common in temperature measuring instrumentation.
A compensating offset voltage can be applied between
analog common and V
nected between V
+
The internal voltage reference potential available at
analog common will normally be used to supply the convert-
er's reference. This potential is stable whenever the supply
potential is greater than approximately 7V. In applications
where an externally-generated reference voltage is desired,
refer to Figure 7.
IN
. The transducer output is con-
IN
and analog common.
f
OSC
=
0.45
RC
Integrating Capacitor –
C
INT
C
INT
should be selected to maximize the integrator
output voltage swing without causing output saturation. Due
to the TC7106A/7107A superior temperature coefficient
specification, analog common will normally supply the differ-
ential voltage reference. For this case a
±
2V full-scale
integrator output swing is satisfactory. For 3 readings/
second (f
OSC
= 48kHz) a 0.22
μ
F value is suggested. If a
different oscillator frequency is used, C
INT
must be changed
in inverse proportion to maintain the nominal
±
2 V integrator
swing.
An exact expression for C
INT
is:
C
INT
=
V
INT
Where:
f
OSC
= Clock frequency at Pin 38
V
FS
= Full-scale input voltage
R
INT
= Integrating resistor
V
INT
= Desired full-scale integrator output swing
C
INT
must have low dielectric absorption to minimize
rollover error. A polypropylene capacitor is recommended.
Integrating Resistor –
R
INT
The input buffer amplifier and integrator are designed
with class A output stages. The output stage idling current
is 100
μ
A. The integrator and buffer can supply 20
μ
A drive
currents with negligible linearity errors. R
INT
is chosen to
remain in the output stage linear drive region but not so large
that printed circuit board leakage currents induce errors. For
a 200mV full-scale, R
INT
is 47k
. 2.0V full-scale requires
470k
.
Component
Value
C
AZ
R
INT
C
INT
Note:
1.
Nominal Full-Scale Voltage
200.0mV
0.47
μ
F
47k
0.22
μ
F
2.000V
0.047
μ
F
470k
0.22
μ
F
f
OSC
= 48kHz (3 readings/sec)
V
FS
R
INT
1
f
OSC
(4000) (
) (
)
TC7106
TC7106A
TC7107
TC7107A
3-1/2 DIGIT A/D CONVERTERS
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