參數(shù)資料
型號: TC7106A
廠商: TelCom Semiconductor, Inc.
元件分類: 串行ADC
英文描述: 3-1/2 DIGIT A/D CONVERTERS
中文描述: 3-1/2位數(shù)的A / D轉(zhuǎn)換器
文件頁數(shù): 6/19頁
文件大小: 296K
代理商: TC7106A
3-188
TELCOM SEMICONDUCTOR, INC.
TC7106
TC7106A
TC7107
TC7107A
3-1/2 DIGIT A/D CONVERTERS
GENERAL THEORY OF OPERATION
DUAL SLOPE CONVERSION PRINCIPLES
(All Pin Designations Refer to the 40-Pin DIP)
The TC7106A and TC7107A are dual slope, integrating
analog-to-digital converters. An understanding of the dual
slope conversion technique will aid in following the detailed
operation theory.
The conventional dual slope converter measurement
cycle has two distinct phases:
Input Signal Integration
Reference Voltage Integration (Deintegration)
The input signal being converted is integrated for a fixed
time period (T
SI
). Time is measured by counting clock
pulses. An opposite polarity constant reference voltage is
then integrated until the integrator output voltage returns to
zero. The reference integration time is directly proportional
to the input signal (T
RI
). (Figure 2A).
In a simple dual slope converter a complete conversion
requires the integrator output to “ramp-up” and “ramp-
down.”
A simple mathematical equation relates the input signal,
reference voltage and integration time:
RC
0
IN
(t)dt =
Figure 2A. Basic Dual Slope Converter
1
T
SI
V
R
T
RI
RC
where:
V
R
= Reference Voltage
T
SI
= Signal Integration Time (Fixed)
T
RI
= Reference Voltage Integration Time (Variable)
For a constant V
IN
:
V
IN
= V
R
T
RI
T
SI
+
REF
VOLTAGE
ANALOG
INPUT
SIGNAL
+
DISPLAY
SWITCH
DRIVER
CLOGIC
I
O
CLOCK
COUNTER
POLARITY CONTROL
PHASE
CONTROL
VIN
VIN
VFULL SCALE
1/2 VFULL SCALE
VARIABLE
REFERENCE
INTEGRATE
TIME
FIXED
SIGNAL
INTEGRATE
TIME
INTEGRATOR
C
COMPARATOR
+/–
PIN DESCRIPTION
(Cont.)
Pin No.
40-Pin PDIP
(Normal)
Pin No.
40-Pin PDIP
(Reverse)
Symbol
C
+
Description
34
(7)
REF
A 0.1
μ
F capacitor is used in most applications. If a large common-
mode voltage exists (for example, the V
common), and a 200mV scale is used, a 1
μ
F capacitor is recom-
mended and will hold the roll-over error to 0.5 count.
See pin 36.
The analog input required to generate a full-scale output (1999
counts). Place 100mV between pins 35 and 36 for 199.9mV
full-scale. Place 1V between pins 35 and 36 for 2V full scale. See
paragraph on REFERENCE VOLTAGE.
Lamp test. When pulled HIGH (to V
+
) all segments will be turned on
and the display should read –1888. It may also be used as a negative
supply for externally-generated decimal points. See paragraph under
TEST for additional information.
See pin 40.
See pin 40.
Pins 40, 39, 38 make up the oscillator section. For a 48kHz clock
(3 readings per section), connect pin 40 to the junction of a 100k
resistor and a 100pF capacitor. The 100k
resistor is tied to pin 39
and the 100pF capacitor is tied to pin 38.
IN
pin is not at analog
35
36
(6)
(5)
V
V
+
REF
37
(4)
Test
38
39
40
(3)
(2)
(1)
OSC
3
OSC
2
OSC
1
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