參數(shù)資料
型號(hào): TC58DVM72F1FT00
廠商: Toshiba Corporation
英文描述: 128-MBIT (16M x 8 BITS/8M x 16BITS) CMOS NAND E2PROM
中文描述: 128兆位(16米x 8 BITS/8M x 16位)的CMOS NAND型E2PROM的
文件頁數(shù): 20/34頁
文件大?。?/td> 369K
代理商: TC58DVM72F1FT00
TC58DVM72A1FT00/ TC58DVM72F1FT00
TC58DAM72A1FT00/ TC58DAM72F1FT00
2003-01-24 20/34
Read Mode (3)
Read mode (3) has the same timing as Read modes (1) and (2) but is used to access information in the extra
16-byte redundancy area of the page. The start pointer is therefore set to a value between byte 512 and byte 527.
X8 : m=527 , n=512
X16 : m=263 , n=256
Sequential Read(1)(2)(3)
This mode allows the sequential reading of pages without additional address input.
Sequential Read modes (1) and (2) output the contents of addresses 0~m as shown above, while Sequential Read
mode (3) outputs the contents of the redundant address locations only. When the pointer reaches the last address,
the device continues to output the data from this address
**
on each
RE
clock signal.
X8 : m=527,n=512
X16 : m=263,n=256
A
Sequential Read (1)
(00H)
0
m
A
Sequential Read (2)
(01H)
A
Sequential Read (3)
(50H)
n
m
BY
/
RY
00H
Busy
01H
Busy
Busy
Address input
t
R
Data output
Data output
t
R
t
R
n/2
BY
/
RY
WE
CLE
RE
Busy
50H
CE
ALE
Figure 5. Read mode (3) operation
527
Addresses bits A0~A3 are used to set the start pointer for the
redundant memory cells, while A4~A7 are ignored.
Once a 50H command has been issued, the pointer moves to
the redundant cell locations and only those 16 cells can be
addressed, regardless of the value of the A4-to-A7 address. (An
00H command is necessary to move the pointer back to the
0-to-511 main memory cell location.)
512
A0~A3
相關(guān)PDF資料
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TC58DVM82A1FT00 128-MBIT (16M x 8 BITS/8M x 16BITS) CMOS NAND E2PROM
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