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參數(shù)資料
| 型號(hào)： | TC55NEM208AFPN |
| 廠商： | Toshiba Corporation |
| 英文描述： | TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS |
| 中文描述： | 馬鞍山暫定東芝數(shù)字集成電路硅柵CMOS |
| 文件頁數(shù)： | 1/10頁 |
| 文件大?。?/td> | 107K |
| 代理商： | TC55NEM208AFPN |
TC55NEM208AFPN/AFTN55,70
2002-09-18 1/10
TENTATIVE
524,288-WORD BY 8-BIT STATIC RAM
DESCRIPTION
TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
The TC55NEM208AFPN/AFTN is a 4,194,304-bit static random access memory (SRAM) organized as 524,288
words by 8 bits. Fabricated using Toshiba's CMOS Silicon gate process technology, this device operates from a
single 5V
±
10% power supply. Advanced circuit technology provides both high speed and low power at an operating
current of 3 mA/MHz (typ) and a minimum cycle time of 55 ns. It is automatically placed in low-power mode at 1
μ
A
standby current (typ) when chip enable (
CE
) is asserted high. There are two control inputs.
CE
is used to select
the device and for data retention control, and output enable (
OE
) provides fast memory access. This device is well
suited to various microprocessor system applications where high speed, low power and battery backup are required.
And, with a guaranteed operating range of
40° to 85°C, the TC55NEM208AFPN/AFTN can be used in
environments exhibiting extreme temperature conditions. The TC55NEM208AFPN/AFTN is available in a
standard plastic 32-pin small-outline package (SOP) and normal and reverse pinout plastic 32-pin
thin-small-outline package (TSOP).
FEATURES
Low-power dissipation
Operating: 15 mW/MHz (typical)
Single power supply voltage of 5 V
±
10%
Power down features using
CE
.
Data retention supply voltage of 2.0 to 5.5 V
Direct TTL compatibility for all inputs and outputs
Wide operating temperature range of
40° to 85°C
Standby Current (maximum):20
μ
A
PIN ASSIGNMENT
(TOP VIEW)
PIN NAMES
32 PIN SOP &
TSOP
A0~A18
Address Inputs
R/W
Read/Write Control
OE
Output Enable
CE
Chip Enable
I/O1~I/O8
Data Inputs/Outputs
V
DD
Power (
+
5 V)
GND
Ground
Access Times (maximum):
TC55NEM208AFPN/AFTN
55
70
Access Time
55 ns
70 ns
CE
Access Time
55 ns
70 ns
OE
Access Time
30 ns
35 ns
Package:
SOP32-P-525-1.27 (AFPN)
TSOP II32-P-400-1.27 (AFTN) (Weight: g typ)
(Weight: g typ)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
V
DD
A15
A17
R/W
A13
A8
A9
A11
A10
I/O8
I/O7
I/O6
I/O5
I/O4
A18
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O1
I/O2
I/O3
GND
CE
OE
(AFPN/AFTN)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TC55NEM208AFPN55 | TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS |
| TC55NEM208AFTN | TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS |
| TC55NEM208AFTN55 | TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS |
| TC55NEM208AFPN70 | Addressable Digital Potentiometer |
| TC55NEM208AFTN70 | TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TC55NEM208AFPN55 | 制造商:TOSHIBA 制造商全稱:Toshiba Semiconductor 功能描述:TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS |
| TC55NEM208AFPN70 | 制造商:TOSHIBA 制造商全稱:Toshiba Semiconductor 功能描述:TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS |
| TC55NEM208AFPV | 制造商:TOSHIBA 制造商全稱:Toshiba Semiconductor 功能描述:524,288-WORD BY 8-BIT STATIC RAM |
| TC55NEM208AFPV55 | 制造商:TOSHIBA 制造商全稱:Toshiba Semiconductor 功能描述:524,288-WORD BY 8-BIT STATIC RAM |
| TC55NEM208AFPV70 | 制造商:TOSHIBA 制造商全稱:Toshiba Semiconductor 功能描述:524,288-WORD BY 8-BIT STATIC RAM |
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