參數(shù)資料
型號(hào)： TC554161FTL-70V
廠商： Toshiba Corporation
英文描述： 262,144-WORD BY 16-BIT STATIC RAM
中文描述： 262,144字由16位靜態(tài)RAM
文件頁(yè)數(shù)： 1/10頁(yè)
文件大?。?/td> 142K
代理商： TC554161FTL-70V
TC554161AFTI-70,-85,-10,-70L,-85L,-10L
2001-08-17 1/10
262,144-WORD BY 16-BIT STATIC RAM
DESCRIPTION
TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
The TC554161AFTI is a 4,194,304-bit static random access memory (SRAM) organized as 262,144 words by
16bits. Fabricated using Toshiba's CMOS Silicon gate process technology, this device operates from a single 5V
10% power supply. Advanced circuit technology provides both high speed and low power at an operating current of
10 mA/MHz (typ) and a minimum cycle time of 70 ns. It is automatically placed in low-power mode at 2 A standby
current (typ) when chip enable (
CE
) is asserted high. There are two control inputs.
CE
is used to select the device
and for data retention control, and output enable (
OE
) provides fast memory access. Data byte control pin (
LB
,
UB
) provides lower and upper byte access. This device is well suited to various microprocessor system applications
where high speed, low power and battery backup are required. And, with a guaranteed operating extreme
temperature range of
40° to 85°C, the TC554161AFTI can be used in environments exhibiting extreme
temperature conditions. The TC554161AFTI is available in a plastic 54-pin thin -small-outline package (TSOP).
FEATURES
Low-power dissipation
Operating: 55 mW/MHz (typical)
Single power supply voltage of 5 V 10%
Power down features using
CE
.
Data retention supply voltage of 2 to 5.5 V
Direct TTL compatibility for all inputs and outputs
Wide operating temperature range of 40° to 85°C
Standby Current (maximum):
TC554161AFTI
-70,-85,-10
-70L,-85L,-10L
5.5 V
3.0 V
200 A
100 A
100 A
50 A
PIN ASSIGNMENT
(TOP VIEW)
NC
A3
A2
A1
A0
I/O16
I/O15
V
GND
I/O14
I/O13
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
PIN NAMES
A0~A17
Address Inputs
I/O1~I/O16
Data Inputs/Outputs
CE
Chip Enable
R/W
Read/Write Control
OE
Output Enable
LB
,
UB
Data Byte Control
V
DD
Power ( 5 V)
GND
Ground
NC
No Connection
OP
*
Option
*
: OP pin must be open of connected to GND.
Access Times (maximum):
TC554161AFTI
-70,-70L
-85,-85L
-10,-10L
Access Time
70 ns
85 ns
100 ns
CE
Access Time
70 ns
85 ns
100 ns
OE
Access Time
35 ns
45 ns
50 ns
Package:
TSOP II54-P-400-0.80 (AFTI) (Weight: 0.57 g typ)
R/W
I/O12
I/O11
GND
V
I/O10
I/O9
NC
A17
A16
A15
A14
A13
A4
A5
A6
A7
NC
I/O1
I/O2
V
GND
I/O3
I/O4
NC
I/O5
I/O6
GND
V
I/O7
I/O8
A8
A9
A10
A11
A12
NC
1
2
3
4
5
6
7
8
9
10
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
CE
OE
UB
LB
(Normal pinout)
相關(guān)PDF資料
PDF描述
TC554161FTL-85V 262,144-WORD BY 16-BIT STATIC RAM
TC554161FTI 262,144-WORD BY 16-BIT STATIC RAM
TC554161FTI-85 262,144-WORD BY 16-BIT STATIC RAM
TC554161FTL 262,144-WORD BY 16-BIT STATIC RAM
TC554161AFTI-70L TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
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