參數(shù)資料
型號: TC54VN1402EMBTR
元件分類: 電源管理
英文描述: 1-CHANNEL POWER SUPPLY SUPPORT CKT, PSSO3
封裝: SOT-89, 3 PIN
文件頁數(shù): 3/7頁
文件大?。?/td> 81K
代理商: TC54VN1402EMBTR
3
TC54-13 8/23/99
TC54 Series
VOLTAGE DETECTOR
TIMING CHART
MARKING
8
12
4
7
11
3
6
10
2
5
9
1
VIN
DETECT VOLTAGE VDET
MINIMUM OPERATING
VOLTAGE
VHYST
VDET
OUTPUT VOLTAGE
RELEASE
VOLTAGE
RESET
VOLTAGE
OR
GROUND LEVEL
+
= output (Nch or CMOS) plus first voltage digit
12 34 56
Nch
LM NPRS
CMOS
B C D E F H
ex: CMOS 3.x =
kkkk
= first voltage decimal (0-9)
ex: CMOS 3.4 =
kkkk
&
= assembly lot number
D
D4
,
&
= 54x (fixed)
= output (C = CMOS, N = Nch)
= first voltage digit (2-6)
= first voltage decimal (0-9)
= extra feature code : fixed : 0
= detecting accuracy
1 =
± 1.0% (custom), 2 = ± 2.0% (standard)
,
&
= assembly lot number
3-Pin SOT-89
3-Pin SOT-23A
3-Pin TO-92
DESCRIPTION OF OPERATION
Refer to the Timing Chart below. In normal steady-state
operation, when VIN > V
DET, the output will be at a logic high.
In the case of the TC54V, this is an open-drain condition. If
and when the input falls below V
DET, the output will pull down
(Logic 0) to VSS. Generally, VOUT can pull down to within
0.5V of VSS at rated output current and input voltage. (See
the Electrical Characteristics section).
The output, VOUT, will stay valid until the input voltage
falls below the Minimum Operating Voltage, VIN(MIN), of
0.7V. Below this minimum operating voltage, the output is
undefined. During power-up or anytime VIN has fallen below
VIN (MIN), VOUT will remain undefined until VIN rises above
VIN(MIN), at which time the output will become valid. VOUT
will be in its active low state while VIN(MIN) < VIN < V+DET.
(V+DET = V
DET + VHYST). If and when the input rises above
V
+
DET, the output will assume its inactive state. (High for
TC54VC, open-drain for TC54VN).
APPLICATIONS
Refer to TelCom Semiconductor Application Note #2,
Using the TC54 Voltage Detector.
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