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參數(shù)資料
| 型號： | TC3405VQRTR |
| 元件分類： | ADC |
| 英文描述： | 4-CH 16-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO16 |
| 封裝： | QSOP-16 |
| 文件頁數(shù)： | 10/12頁 |
| 文件大小： | 68K |
| 代理商： | TC3405VQRTR |
7
TC3405
TC3405-1 12/7/99
16-Bit Low Cost, Low Power
∑ – A/D Converter
Figure 2. Conversion and Data Output Timing
TIMING DIAGRAMS
Figure 3. SCLK, SDAT Logic State Table
*Note: The code x00 has a dual meaning: Data Transfer or Busy Converting.To avoid confusion, the user should send only the required
number of pulses for the desired resolution, then wait for SDAT to rise to 1, indicating conversion complete before clocking SCLK again to
read out data bits.
A
B
C
Status
1
0
Start Conversion
0
1
0
Resolution Reduction
x
1
Data Transfer
x
0
Data Transfer or Busy*
x
0
1
Data Transfer of LSB
SCLK
SDAT
ADDR,
A0, A1
Start Conversion and Resolution Control Timing
Data Output Timing
t4
t1
t2
t3
t8
t6 t7
DN-1
DN-2
D0
(LSB)
DN
(MSB)
t5
Data Conversion
Complete
Sleep
Mode
SCLK
SDAT
A
BC
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