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參數(shù)資料
| 型號： | TC14433TEOG |
| 元件分類： | ADC |
| 英文描述： | 1-CH DUAL-SLOPE ADC, PDSO24 |
| 封裝： | 7.50 MM, PLASTIC, SOIC-24 |
| 文件頁數(shù)： | 22/24頁 |
| 文件大?。?/td> | 382K |
| 代理商： | TC14433TEOG |
2008 Microchip Technology Inc.
DS21394D-page 7
TC14433/A
16
19
DS4
Digit select pin. The digit select output goes high when the respective digit is
selected. The MSD (1/2 digit turns on immediately after an EOC pulse).
17
20
DS3
The remaining digits turn on in sequence from MSD to LSD.
18
21
DS2
To ensure that the BCD data has settled, an inter digit blanking time of two
clock periods is included.
19
23
DS1
Clock frequency divided by 80 equals multiplex rate. For example, a system
clock of 60 kHz gives a multiplex rate of 0.8 kHz.
20
24
Q0
See Figure 5-4 for digit select timing diagram.
21
25
Q1
BCD data output pin. Multiplexed BCD outputs contain three full digits of
information during digit select DS2, DS3, DS4.
22
26
Q2
During DS1, the 1/2 digit, overrange, underrange and polarity information is
available.
23
27
Q3
Refer to the Truth Table 5-1.
24
28
VDD
Positive power supply. This is the most positive power supply pin.
—
1
NC
Not Used.
—
8
NC
Not Used.
—
15
NC
Not Used.
—
22
NC
Not Used.
TABLE 3-1:
PIN FUNCTION TABLE (CONTINUED)
Pin No.
24-Pin PDIP,
SOIC
Pin No.
28-Pin
PLCC
Symbol
Description
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