參數(shù)資料
型號: TC1070
廠商: TelCom Semiconductor, Inc.
英文描述: 50mA ADJUSTABLE CMOS LDO WITH SHUTDOWN
中文描述: 50mA的可調(diào)式CMOS LDO穩(wěn)壓器具有關(guān)斷
文件頁數(shù): 9/12頁
文件大?。?/td> 117K
代理商: TC1070
TC1071
3
PRELIMINARY INFORMATION
TC1071-01
6/13/97
100mA ADJUSTABLE CMOS
LDO WITH SHUTDOWN
ELECTRICAL CHARACTERISTICS:
V
IN
= V
OUT
+ 1V, I
L
= 0.1mA, C
L
= 3.3
μ
F, SHDN > V
IH
, T
A
= 25
°
C, unless otherwise noted.
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
ADJ Input
I
ADJ
NOTES:
1. V
R
is the regulator output voltage setting.
2. TC V
OUT
= (V
OUTMAX –
V
OUTMIN
)
x 10
6
V
x
T
3. Regulation is measured at a constant junction temperature using low duty cycle pulse testing. Load regulation is tested over a load
range from 0.1mA to the maximum specified output current. Changes in output voltage due to heating effects are covered by the
thermal regulation specification.
4. Dropout voltage is defined as the input to output differential at which the output voltage drops 2% below its nominal value.
5. Ground pin current is the regulator pass transistor gate current. The total current drawn from the input supply is the sum of the load
current, ground current and supply current (i.e. I
IN
= I
SUPPLY
+ I
GND
+ I
LOAD
).
6. Thermal Regulation is defined as the change in output voltage at a time T after a change in power dissipation is applied, excluding load
or line regulation effects. Specifications are for a current pulse equal to I
LMAX
at V
IN
= 6V for T = 10msec.
7. The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction temperature and the
thermal resistance from junction-to-air (i.e. T
A
, T
J
, q
JA
). Exceeding the maximum allowable power dissipation causes the device to
initiate thermal shutdown. Please see Thermal Considerationssection of this data sheet for more details.
Adjust Input Leakage Current
50
pA
Pin No.
(SOT-23A-5)
Symbol
Description
1
2
3
V
IN
GND
SHDN
Unregulated supply input.
Ground terminal.
Shutdown control input. The regulator is fully enabled when a logic high is applied to this
input. The regulator enters shutdown when a logic low is applied to this input. During
shutdown, output voltage falls to zero and supply current is reduced to 0.05 microamp
(typical).
Output voltage adjust terminal. Output voltage setting is programmed with a resistor divider
from V
OUT
to this input. A capacitor may also be added to this input to resuce output noise
(See Text).
Regulated voltage output.
4
ADJ
5
V
OUT
PIN DESCRIPTION
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