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參數(shù)資料
| 型號(hào)： | TB1274BFG |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP48 |
| 封裝： | 10 X 14 MM, 0.80 MM PITCH, QFP-48 |
| 文件頁數(shù)： | 7/37頁 |
| 文件大小： | 839K |
| 代理商： | TB1274BFG |
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TB1274BFG
2005-08-18
15
Data receive format
S
Slave address
1 A
Received data 00
A
A P
MSB
7bit
8bit
Received data 01
At the moment of the first acknowledge, the master transmitter becomes a master receiver and the slave
receiver becomes a slave transmitter. This acknowledge is still generated by the slave.
The Stop condition is generated by the master.
Option Data transmit format
Automatic increment mode 1
S
Slave address
0 A
Sub address
A
Transmit data
P
MSB
S : Start condition
A : Acknowledge
MSB
P : Stop condition
7bit
8bit
0
Automatic increment mode 2
S
Slave address
0 A
Sub address
A
A P
7bit
Transmit data 1
0
8bit
Transmit data n
8bit
In this transmission method, data is set on automatically incremented sub-address from the specified
sub-address.
I
2C BUS Conditions
Characteristics
Symbol
Min
Typ.
Max
Unit
Low level input voltage
VIL
0
1.3
V
High level input voltage
VIH
3.8
Vcc
V
Low level output voltage at 3 mA sink current
VOL1
0
0.4
V
Input current each I/O pin with an input voltage
between 0.1 VDD and 0.9 VDD
Ii
10
10
A
Capacitance for each I/O pin
Ci
10
pF
SCL clock frequency
fSCL
0
100
kHz
Hold time START condition
tHD;STA
4.0
s
Low period of SCL clock
tLOW
4.7
s
High period of SCL clock
tHIGH
4.0
s
Set-up time for a repeated START condition
tSU;STA
4.7
s
Data hold time
tHD;DAT
50
ns
Data set-up time
tSU;DAT
250
ns
Set-up time for STOP condition
tSU;STO
4.0
s
Bus free time between a STOP and START condition
tBUF
4.7
s
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