參數(shù)資料
型號: TAS5709PHP
廠商: TEXAS INSTRUMENTS INC
元件分類: 音頻/視頻放大
英文描述: 20.6 W, 2 CHANNEL, AUDIO AMPLIFIER, PQFP48
封裝: 7 X 7 MM, GREEN, PLASTIC, HTQFP-48
文件頁數(shù): 27/60頁
文件大?。?/td> 1210K
代理商: TAS5709PHP
www.ti.com ..................................................................................................................................... SLOS599A – NOVEMBER 2008 – REVISED SEPTEMBER 2009
5.
Configure remaining registers
6.
Exit shutdown (sequence defined below).
Normal Operation
The following are the only events supported during normal operation:
(a) Writes to master/channel volume registers
(b) Writes to soft mute register
(c) Enter and exit shutdown (sequence defined below)
(d) Clock errors and rate changes
Note: Events (c) and (d) are not supported for 240ms+1.3*Tstart after trim following AVDD/DVDD powerup
ramp (where Tstart is specified by register 0x1A).
Shutdown Sequence
Enter:
1.
Ensure I2S clocks have been stable and valid for at least 50ms.
2.
Write 0x40 to register 0x05.
3.
Wait at least 1ms+1.3*Tstop (where Tstop is specified by register 0x1A).
4.
Once in shutdown, stable clocks are not required while device remains idle.
5.
If desired, reconfigure by ensuring that clocks have been stable and valid for at least 50ms before
returning to step 4 of initialization sequence.
Exit:
1.
Ensure I2S clocks have been stable and valid for at least 50ms.
2.
Write 0x00 to register 0x05 (exit shutdown command may not be serviced for as much as 240ms
after trim following AVDD/DVDD powerup ramp).
3.
Wait at least 1ms+1.3*Tstart (where Tstart is specified by register 0x1A).
4.
Proceed with normal operation.
Powerdown Sequence
Use the following sequence to powerdown the device and its supplies:
1.
If time permits, enter shutdown (sequence defined above); else, in case of sudden power loss,
assert PDNZ=0 and wait at least 2ms.
2.
Assert RESETZ=0.
3.
Drive digital inputs low and ramp down PVDD supply as follows:
Drive all digital inputs low after RESETZ has been low for at least 2us.
Ramp down PVDD while ensuring that it remains above 8V until RESETZ has been low for at
least 2us.
4.
Ramp down AVDD/DVDD while ensuring that it remains above 3V until PVDD is below 6V and
that it is never more than 2.5V below the digital inputs.
Copyright 2008–2009, Texas Instruments Incorporated
33
Product Folder Link(s): TAS5709 TAS5709A
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