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參數(shù)資料
| 型號(hào)： | TAS5612PHD |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 音頻／視頻放大 |
| 英文描述： | 125 W, 2 CHANNEL, AUDIO AMPLIFIER, PQFP64 |
| 封裝： | GREEN, HTQFP-64 |
| 文件頁數(shù)： | 13/26頁 |
| 文件大小： | 1718K |
| 代理商： | TAS5612PHD |
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SLAS710 – JUNE 2010
www.ti.com
<15 ms/mF. While the PPSC detection is in progress, SD is kept low, and the device will not react to changes
applied to the RESET pins. If no shorts are present the PPSC detection passes, and SD is released. A device
reset will not start a new PPSC detection. PPSC detection is enabled in BTL and PBTL output configurations, the
detection is not performed in SE mode. To make sure not to trip the PPSC detection system it is recommended
not to insert resistive load to GND_X or PVDD_X.
OVERTEMPERATURE PROTECTION
The two different package options has individual over temperature protection schemes.
PHD Package
The TAS5612A PHD package option has a three-level temperature-protection system that asserts an active-low
warning signal (OTW1) when the device junction temperature exceeds 100°C (typical), (OTW2) when the device
junction temperature exceeds 125°C (typical) and, if the device junction temperature exceeds 155°C (typical), the
device is put into thermal shutdown, resulting in all half-bridge outputs being set in the high-impedance (Hi-Z)
state and SD being asserted low. OTE is latched in this case. To clear the OTE latch, RESET must be asserted.
Thereafter, the device resumes normal operation.
DKD Package
The TAS5612A DKD package option has a two-level temperature-protection system that asserts an active-low
warning signal (OTW) when the device junction temperature exceeds 125°C (typical) and, if the device junction
temperature exceeds 155°C (typical), the device is put into thermal shutdown, resulting in all half-bridge outputs
being set in the high-impedance (Hi-Z) state and SD being asserted low. OTE is latched in this case. To clear the
OTE latch, RESET must be asserted. Thereafter, the device resumes normal operation.
UNDERVOLTAGE PROTECTION (UVP) AND POWER-ON RESET (POR)
The UVP and POR circuits of the TAS5612A fully protect the device in any power-up/down and brownout
situation. While powering up, the POR circuit resets the overload circuit (OLP) and ensures that all circuits are
fully operational when the GVDD_X and VDD supply voltages reach stated in the Electrical Characteristics table.
Although GVDD_X and VDD are independently monitored, a supply voltage drop below the UVP threshold on
any VDD or GVDD_X pin results in all half-bridge outputs immediately being set in the high-impedance (Hi-Z)
state and SD being asserted low. The device automatically resumes operation when all supply voltages have
increased above the UVP threshold.
DEVICE RESET
When RESET is asserted low, all power-stage FETs in the four half-bridges are forced into a high-impedance
(Hi-Z) state.
In BTL modes, to accommodate bootstrap charging prior to switching start, asserting the reset input low enables
weak pulldown of the half-bridge outputs. In the SE mode, the output is forced into a high impedance state when
asserting the reset input low. Asserting reset input low removes any fault information to be signaled on the SD
output, i.e., SD is forced high. A rising-edge transition on reset input allows the device to resume operation after
an overload fault. To ensure thermal reliability, the rising edge of reset must occur no sooner than 4 ms after the
falling edge of SD.
SYSTEM DESIGN CONSIDERATION
A rising-edge transition on reset input allows the device to execute the startup sequence and starts switching.
Apply only audio when the state of READY is high that will start and stop the amplifier without having audible
artifacts that is heard in the output transducers. If an overcurrent protection event is introduced the READY signal
goes low, hence, filtering is needed if the signal is intended for audio muting in non micro controller systems.
The CLIP signal is indicating that the output is approaching clipping. The signal can be used to either an audio
volume decrease or intelligent power supply controlling a low and a high rail.
The device is inverting the audio signal from input to output.
The VREG pin is not recommended to be used as a voltage source for external circuitry.
20
Copyright 2010, Texas Instruments Incorporated
Product Folder Link(s): TAS5612A
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PDF描述 |
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| TAS5612PHDR | 125 W, 2 CHANNEL, AUDIO AMPLIFIER, PQFP64 |
| TAS5613ADKD | 150 W, 2 CHANNEL, AUDIO AMPLIFIER, PDSO44 |
| TAS5613PHDR | 150 W, 2 CHANNEL, AUDIO AMPLIFIER, PQFP64 |
| TAS5613PHD | 150 W, 2 CHANNEL, AUDIO AMPLIFIER, PQFP64 |
| TAS5613APHDR | 150 W, 2 CHANNEL, AUDIO AMPLIFIER, PQFP64 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TAS5612PHD | 制造商:Texas Instruments 功能描述:Speaker Amplifier IC 制造商:Texas Instruments 功能描述:IC, AUDIO PWR AMP, CLASS D 125W HTQFP-64 |
| TAS5612PHD2EVM | 功能描述:音頻 IC 開發(fā)工具 TAS5612PHD Eval Mod RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Kits 類型:Audio Amplifiers 工具用于評(píng)估:TAS5614L 工作電源電壓:12 V to 38 V |
| TAS5612PHDR | 功能描述:音頻放大器 125W Stereo/250W Mono PurePath RoHS:否 制造商:STMicroelectronics 產(chǎn)品:General Purpose Audio Amplifiers 輸出類型:Digital 輸出功率: THD + 噪聲: 工作電源電壓:3.3 V 電源電流: 最大功率耗散: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-64 封裝:Reel |
| TAS5613 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:150W STEREO / 300W MONO PurePath? HD ANALOG-INPUT POWER STAGE |
| TAS5613A | 制造商:TI 制造商全稱:Texas Instruments 功能描述:150W STEREO / 300W MONO PurePath? HD ANALOG-INPUT POWER STAGE |
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