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Device Protection System
OVERCURRENT (OC) PROTECTION WITH
TAS5186
SLES136 – MAY 2005
Any fault resulting in device shutdown is signaled by
two protection systems. The first protection system
the SD pin going low. Likewise, OTW goes low when
controls the power stage in order to prevent the
the device junction temperature exceeds 125°C (see
output current from further increasing. I.e., it performs
the following table).
a current-limiting function rather than prematurely
shutting down during combinations of high-level mu-
sic transients and extreme speaker load-impedance
SD
OTW
DESCRIPTION
drops. If the high-current situation persists, i.e., the
power stage is being overloaded, a second protection
0
Overtemperature (OTE) or overload (OLP) or
undervoltage (UVP)
system triggers a latching shutdown, resulting in the
power stage being set in the high-impedance (Hi-Z)
0
1
Overload (OLP) or undervoltage (UVP)
state.
1
0
Overtemperature warning. Junction temperature
higher than 125°C, typical
For
added
flexibility,
the
OC
threshold
is
1
Normal operation. Junction temperature lower than
programmable within a limited range using a single
125°C, typical
external resistor connected between the OC_ADJ pin
and AGND.
It should be noted that asserting RESET low forces
OC-Adjust Resistor Values
Maximum Current Before OC
the SD and OTW signals high independently of faults
(k
)
Occurs (A)
being present. It is recommended to monitor the
15
5 (sat.), 8 (sub.)
OTW signal using the system microcontroller and to
respond to an overtemperature warning signal by,
18
4.5 (sat.), 7.5 (sub.)
e.g., turning down the volume to prevent further
It should be noted that a properly functioning
heating of the device that would result in device
overcurrent detector assumes the presence of a
shutdown (OTE). To reduce external component
properly
designed
demodulation
filter
at
the
count, an internal pullup resistor to 3.3 V is provided
power-stage output. Short-circuit protection is not
on both the SD and OTW outputs. Level compliance
provided directly at the output pins of the power stage
for 5-V logic can be obtained by adding external
but only on the speaker terminals (after the demodu-
pullup resistors to 5 V (see the Electrical Character-
lation filter). It is required to follow certain guidelines
istics section of this data sheet for further specifi-
when selecting the OC threshold and an appropriate
cations).
demodulation inductor.
For the lowest-cost bill of materials in terms of
component selection, the OC threshold current
The TAS5186 contains advanced protection circuitry
should be limited, considering the power output
carefully designed to facilitate system integration and
requirement
and
minimum
load
impedance.
ease of use, as well as safeguarding the device from
Higher-impedance loads require a lower OC
permanent failure due to a wide range of fault
threshold.
conditions such as short circuit, overload, and
The demodulation filter inductor must retain at
undervoltage. The TAS5186 responds to a fault by
least 5
H of inductance at twice the OC
immediately
setting
the
power
stage
in
a
threshold setting.
high-impedance state (Hi-Z) and asserting the SD pin
low. In situations other than overload, the device
Most inductors have decreasing inductance with in-
automatically recovers when the fault condition has
creasing
temperature
and
increasing
current
been
removed,
e.g.,
the
supply
voltage
has
(saturation). To some degree, an increase in tem-
increasedor
the
temperature
has
dropped.
For
perature naturally occurs when operating at high
highest possible reliability, recovering from an over-
output currents, due to inductor core losses and the
load fault requires external reset of the device no
dc resistance of the inductor copper winding. A
sooner than 1 second after the shutdown (see the
thorough analysis of inductor saturation and thermal
Device Reset section of this data sheet).
properties is strongly recommended.
Setting the OC threshold too low might cause issues
such as lack of output power and/or unexpected
CURRENT LIMITING AND OVERLOAD DE-
shutdowns due to sensitive overload detection.
TECTION
In general, it is recommended to follow closely the
The device has independent, fast-reacting current
external component selection and PCB layout as
detectors with programmable trip threshold (OC
given in the application section.
threshold) on all high-side and low-side power-stage
FETs. See the following table for OC-adjust resistor
values. The detector outputs are closely monitored by
13