參數(shù)資料
型號: TAS3004PFB
廠商: TEXAS INSTRUMENTS INC
元件分類: 消費家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQFP48
封裝: GREEN, PLASTIC, TQFP-48
文件頁數(shù): 9/84頁
文件大?。?/td> 671K
代理商: TAS3004PFB
2–4
2.2.3
MSB Left-Justified Serial Interface Format—Normal Mode
The normal output mode for the MSB left-justified serial interface format is for 16, 18, 20, and 24 bits with bit 7 (ADM)
in the analog control register cleared to 0.
Figure 2–3 shows the following characteristics of this protocol:
Left channel is transmitted when LRCLK is high.
The SDIN data is justified to the leading edge of the LRCLK.
The MSBs are transmitted at the same time as LRCLK edge and captured at the next rising edge of SCLK.
SCLK
LRCLK = fS
MSB
LSB
…… MSB
LSB
……
SDIN
MSB
LSB
…… MSB
LSB
……
Left Channel
Right Channel
SDOUT
……
Figure 2–3. MSB Left-Justified Serial Interface Format—Normal Mode
2.3
ADC Digital Output Mode—Monaural
For the monaural ADC digital output mode, bit 7 (ADM) is set to 1, and bit 6 (LRB) and bit 1 (INP) in the analog control
register (see Section 4.8, Analog Control Register Operation) control the operation of the monaural output mode. All
interface formats are for 16, 18, 20, and 24 bits.
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