參數(shù)資料
型號(hào)： TA1383AFG
廠商： Toshiba Corporation
元件分類： 通用總線功能
英文描述： NTSC Chroma Decoder, Multi-Point Scan Sync Processor, H/V Frequency Counter IC for Color TV
中文描述： NTSC制式色度解碼器，多點(diǎn)掃描同步處理器，水平/垂直頻率計(jì)數(shù)器集成電路彩色電視
文件頁數(shù)： 14/47頁
文件大?。?/td> 1010K
代理商： TA1383AFG
TA1383AFG
2005-09-05
14
How To Start I
2
C Bus
After power on, TA1383FG pins 28 and 29 (Cr/Pr/R IN, Cb/Pb/B IN) are in Full-Field Clamp Mode.
Full-Field Clamp Mode is released by writing or reading. And then, clamp is performed only during the
clamp pulse period.
Described below is how to send bus data after power on. Use software to handle the procedure.
1. Turn power on.
2. Transmit all write data.
How To Transmit/Receive Via I
2
C Bus
Slave Address: Can Be Changed Using Pin 12.
(V
CC1
=
9 V, V
CC2
=
5 V)
Pin 12-GND (GND to 1.2 V): D8H/D9H
Pin 12-3 V (1.8 to 4.2 V): DAH/DBH
A6
A5
A4
A3
A2
A1
A0
W/R
A6
A5
A4
A3
A2
A1
A0
W/R
1
1
0
1
1
0
0
0/1
1
1
0
1
1
0
1
0/1
Pin 12-6 V (4.8 to 7.2 V): DCH/DDH
Pin 12-V
CC1
(7.8 to V
CC1
) DEH/DFH
A6
A5
A4
A3
A2
A1
A0
W/R
A6
A5
A4
A3
A2
A1
A0
W/R
1
1
0
1
1
1
0
0/1
1
1
0
1
1
1
1
0/1
Start and Stop Conditions
Bit Transmission
Acknowledgement
SDA from
transmitter
Low impedance at bit
9 only
Clock pulse for acknowledgement
S
High impedance at bit 9
1
8
9
SDA from receiver
SCL from master
SDA
SCL
S
Start condition
P
Stop condition
SDA
SCL
SDA must not be changed
SDA may be changed
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