參數(shù)資料
型號(hào): TA1318AF
廠商: Toshiba Corporation
元件分類(lèi): 通用總線功能
英文描述: SYNC Processor, Frequency Counter IC for TV Component Signals
中文描述: 同步處理器,頻率計(jì)數(shù)器集成電路電視分量信號(hào)
文件頁(yè)數(shù): 17/42頁(yè)
文件大?。?/td> 595K
代理商: TA1318AF
TA1318AF
2003-02-19
17
Data Transmit Format 1
Data Transmit Format 2
Data Receive Format
At the moment of the first acknowledge, the master transmitter becomes a master receiver and the slave
transmitter. This acknowledge is still generated by this slave.
The Stop condition is generated by the master.
(
*
important) The data read from THIS IC should always be completed in whole two words, not one word,
otherwise the IICBUS may cause error.
Optional Data Transmit Format: Automatic Increment Mode
In this transmission method, data is set on automatically incremented sub-address from the specified
sub-address.
Purchase of TOSHIBA I
2
C components conveys a license under the Philips I
2
C Patent Rights to use
these components in an I
2
C system, provided that the system conforms to the I
2
C Standard Specification
as defined by Philips.
S
Slave address
7 bit
0 A
Transmit data
8 bit
A
Sub address
8 bit
A P
MSB
S: Start condition
MSB
A: Acknowledge
MSB
P: Stop condition
S
Slave address
0 A
Transmit data
A
Sub address
A
Transmit data n
A
Sub address
A P
S
Slave address
7 bit
1 A
Received data 2
A
Received data 1
8 bit
A P
MSB
MSB
S
Slave address
7 bit
A
Transmit data 2
8 bit
Transmit data 1
8 bit
A P
MSB
MSB
0
Sub address
7 bit
MSB
A 1
MSB
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