參數(shù)資料
型號: TA1317ANG
廠商: Toshiba Corporation
英文描述: Zener Diode; Application: Low noise; Pd (mW): 250; Vz (V): 3.7 to 4.1; Condition Iz at Vz (mA): 0.5; C (pF) max: -; Condition VR at C (V):   ESD (kV) min: -; Package: DO-35
中文描述: 偏轉(zhuǎn)處理器芯片電視
文件頁數(shù): 18/59頁
文件大?。?/td> 1025K
代理商: TA1317ANG
TA1317ANG
2005-08-18
18
Data Transmit Format 1
Data Transmit Format 2
Data Receive Format
At the moment of the first acknowledge, the master transmitter becomes a receiver and the slave receiver
becomes a transmitter.
The Stop condition is generated by the master.
Optional Data Transmit Format: Automatic Increment Mode
In this transmission method, sub-addresses are incremented automatically and data is set from the specified
sub-address.
I
2
C BUS Conditions
Characteristics
Symbol
Min
Typ.
Max
Unit
Low level input voltage
V
IL
0
1.5
V
High level input voltage
V
IH
2.7
Vcc
V
Low level output voltage at 3 mA sink current
V
OL1
0
0.4
V
Input current each I/O pin with an input voltage
between 0.1 VDD and 0.9 VDD
I
i
10
10
μ
A
Capacitance for each I/O pin
C
i
10
pF
SCL clock frequency
f
SCL
0
100
kHz
Hold time START condition
t
HD;STA
4.0
μ
s
Low period of SCL clock
t
LOW
4.7
μ
s
High period of SCL clock
t
HIGH
4.0
μ
s
Set-up time for a repeated START condition
t
SU;STA
4.7
μ
s
Data hold time
t
HD;DAT
100
ns
Data set-up time
t
SU;DAT
250
ns
Set-up time for STOP condition
t
SU;STO
4.0
μ
s
Bus free time between a STOP and START condition
t
BUF
4.7
μ
s
S
Slave address
7 bit
0 A
Transmit data
9 bit
A
Sub address
8 bit
A P
MSB
S: Start condition
MSB
A: Acknowledge
MSB
P: Stop condition
S
Slave address
0 A
Transmit data
A
Sub address
A
Transmit data n
A
Sub address
A P
S
Slave address
7 bit
1 A
A
Receive data
8 bit
P
MSB
MSB
S
Slave address
7 bit
A
Transmit data 2
8 bit
Transmit data 1
8 bit
A P
MSB
MSB
0
Sub address
7 bit
MSB
A 1
MSB
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