參數(shù)資料
型號： T89C51RD2-SLRC-L
廠商： Atmel Corp.
英文描述： 0 to 40MHz Flash Programmable 8-bit Microcontroller
中文描述： 0至40MHz可編程閃存8位微控制器
文件頁數(shù)： 52/170頁
文件大?。?/td> 1927K
代理商： T89C51RD2-SLRC-L
52
A/T89C51CC01
4129L–CAN–08/05
Boot Process
Software Boot Process
Example
Many algorithms can be used for the software boot process. Below are descriptions of
the different flags and Bytes.
Boot Loader Jump Bit (BLJB):
- This bit indicates if on RESET the user wants to jump to this application at address
@0000h on FM0 or execute the boot loader at address @F800h on FM1.
- BLJB = 0 (i.e. bootloader FM1 executed after a reset) is the default Atmel factory pro-
gramming.
- To read or modify this bit, the APIs are used.
Boot Vector Address (SBV):
- This byte contains the MSB of the user boot loader address in FM0.
- The default value of SBV is FFh (no user boot loader in FM0).
- To read or modify this byte, the APIs are used.
Extra Byte (EB) and Boot Status Byte (BSB):
- These Bytes are reserved for customer use.
- To read or modify these Bytes, the APIs are used.
Hardware Boot Process
At the falling edge of RESET, the bit ENBOOT in AUXR1 register is initialized with the
value of Boot Loader Jump Bit (BLJB).
Further at the falling edge of RESET if the following conditions (called Hardware condi-
tion) are detected. The FCON register is initialized with the value 00h and the PC is
initialized with F800h (FM1 lower byte = Bootloader entry point).
Hardware Conditions:
PSEN low
(1)
EA high,
ALE high (or not connected).
The Hardware condition forces the bootloader to be executed, whatever BLJB value is.
Then BLBJ will be checked.
If no hardware condition is detected, the FCON register is initialized with the value F0h.
Then BLJB value will be checked.
Conditions are:
If bit BLJB = 1:
User application in FM0 will be started at @0000h (standard reset).
If bit BLJB = 0:
Boot loader will be started at @F800h in FM1.
Note:
1. As PSEN is an output port in normal operating mode (running user applications or
bootloader applications) after reset it is recommended to release PSEN after the fall-
ing edge of Reset is signaled.
The hardware conditions are sampled at reset signal Falling Edge, thus they can be
released at any time when reset input is low.
2. To ensure correct microcontroller startup, the PSEN pin should not be tied to ground
during power-on.
相關(guān)PDF資料
PDF描述
T89C51RD2-RLRC-L 0 to 40MHz Flash Programmable 8-bit Microcontroller
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T89C51RD2-RLRC-M SOCKET, 479P, MPGA479, PENTIUM M, CENTRINO, SMT, 1.27MM PITCH
T89C51RD2-SLBI-L 0 to 40MHz Flash Programmable 8-bit Microcontroller
T89C51RD2-RLBI-L 0 to 40MHz Flash Programmable 8-bit Microcontroller
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
T89C51RD2-SLRCM 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:0 to 40 MHz Flash Programmable 8-bit Microcontroller
T89C51RD2-SLRC-M 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:0 to 40MHz Flash Programmable 8-bit Microcontroller
T89C51RD2-SLRI-L 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:0 to 40MHz Flash Programmable 8-bit Microcontroller
T89C51RD2-SLRIM 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:0 to 40 MHz Flash Programmable 8-bit Microcontroller
T89C51RD2-SLRI-M 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:0 to 40MHz Flash Programmable 8-bit Microcontroller
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