參數(shù)資料
型號(hào): T89C51RD2-DDBC-L
廠(chǎng)商: Atmel Corp.
英文描述: 0 to 40MHz Flash Programmable 8-bit Microcontroller
中文描述: 0至40MHz可編程閃存8位微控制器
文件頁(yè)數(shù): 83/170頁(yè)
文件大?。?/td> 1927K
代理商: T89C51RD2-DDBC-L
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83
A/T89C51CC01
4129L–CAN–08/05
ACK Errors
As already mentioned frames received are acknowledged by all receivers through
positive acknowledgement. If no acknowledgement is received by the transmitter of
the message an ACK error is indicated.
Error at Bit Level
Monitoring
The ability of the transmitter to detect errors is based on the monitoring of bus
signals. Each node which transmits also observes the bus level and thus detects
differences between the bit sent and the bit received. This permits reliable detection
of global errors and errors local to the transmitter.
Bit Stuffing
The coding of the individual bits is tested at bit level. The bit representation used by
CAN is "Non Return to Zero (NRZ)" coding, which guarantees maximum efficiency
in bit coding. The synchronization edges are generated by means of bit stuffing.
Error Signalling
If one or more errors are discovered by at least one node using the above mechanisms,
the current transmission is aborted by sending an "error flag". This prevents other nodes
accepting the message and thus ensures the consistency of data throughout the net-
work. After transmission of an erroneous message that has been aborted, the sender
automatically re-attempts transmission.
CAN Controller
Description
The CAN Controller accesses are made through SFR.
Several operations are possible by SFR:
arithmetic and logic operations, transfers and program control (SFR is accessible by
direct addressing).
15 independent message objects are implemented, a pagination system manages
their accesses.
Any message object can be programmed in a reception buffer block (even non-consec-
utive buffers). For the reception of defined messages one or several receiver message
objects can be masked without participating in the buffer feature. An IT is generated
when the buffer is full. The frames following the buffer-full interrupt will not be taken into
account until at least one of the buffer message objects is re-enabled in reception.
Higher priority of a message object for reception or transmission is given to the lower
message object number.
The programmable 16-bit Timer (CANTIMER) is used to stamp each received and sent
message in the CANSTMP register. This timer starts counting as soon as the CAN con-
troller is enabled by the ENA bit in the CANGCON register.
The Time Trigger Communication (TTC) protocol is supported by the T89C51CC01.
相關(guān)PDF資料
PDF描述
T89C51RD2-DDBC-M 0 to 40MHz Flash Programmable 8-bit Microcontroller
T89C51RD2-RDBC-L 0 to 40MHz Flash Programmable 8-bit Microcontroller
T89C51RD2-RDBC-M 0 to 40MHz Flash Programmable 8-bit Microcontroller
T89C51RD2-RDSC-L 0 to 40MHz Flash Programmable 8-bit Microcontroller
T89C51RD2-RDSC-M 0 to 40MHz Flash Programmable 8-bit Microcontroller
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
T89C51RD2-DDBC-M 制造商:ATMEL 制造商全稱(chēng):ATMEL Corporation 功能描述:0 to 40MHz Flash Programmable 8-bit Microcontroller
T89C51RD2-DDBI-L 制造商:ATMEL 制造商全稱(chēng):ATMEL Corporation 功能描述:0 to 40MHz Flash Programmable 8-bit Microcontroller
T89C51RD2-DDBI-M 制造商:ATMEL 制造商全稱(chēng):ATMEL Corporation 功能描述:0 to 40MHz Flash Programmable 8-bit Microcontroller
T89C51RD2-DDFC-L 制造商:ATMEL 制造商全稱(chēng):ATMEL Corporation 功能描述:0 to 40MHz Flash Programmable 8-bit Microcontroller
T89C51RD2-DDFC-M 制造商:ATMEL 制造商全稱(chēng):ATMEL Corporation 功能描述:0 to 40MHz Flash Programmable 8-bit Microcontroller