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參數(shù)資料
| 型號(hào)： | T73LVP20-DIE |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 3.3V LVTTL/LVCMOS-to-Differential LVPECL Translator |
| 中文描述： | 3.3 LVTTL /的LVCMOS到差分LVPECL翻譯 |
| 文件頁數(shù)： | 3/5頁 |
| 文件大?。?/td> | 418K |
| 代理商： | T73LVP20-DIE |
T73LVP20
Preliminary Information
Table 4. DC Characteristics
T
A
= -40
o
C to +85
o
C, V
DD
= +3.0V to +3.6V unless otherwise stated below.
Symbol
Parameter
I
IH
Input HIGH Current
Conditions
V
IN
=+2.7V
Min
Typ
Max
100
Units
μ
A
I
IL
Input LOW Current
V
IN
= +0.5V
1
μ
A
V
IK
Input Clamp Diode Voltage
I
IN
= -18mA
-40
o
C
-1.2
V
2220
2320
2420
mV
+25
o
C
2220
2320
2420
mV
V
OH
Output HIGH Voltage
(1, 2)
+85
o
C
V
DD
= +3.3V
2220
2320
2420
mV
-40
o
C
1420
1520
1620
mV
+25
o
C
1420
1520
1620
mV
V
OL
Output LOW Voltage
(1, 2)
+85
o
C
V
DD
= +3.3V
1420
1520
1620
mV
I
DD
Power Supply Current
No Load
23
mA
Notes:
The circuit is in a test socket or mounted on a printed circuit board.
2. Q and Qn outputs are loaded with 50 ohms to V
DD
-2 volts.
1. The T73LVP20 is designed to meet these specifications after thermal equilibrium has been established.
Table 5. AC Characteristics
T
A
= -40
o
C to +85
o
C, V
DD
= +3.0V to +3.6V
Symbol
t
PLH
Propagation Delay
(1)
Propagation Delay
(1)
Parameter
Conditions
To Output Differential
Min
Typ
350
Max
500
Units
ps
t
PHL
To Output Differential
350
500
ps
t
r
/t
f
Output Rise/Fall time
20%-80%, Q, Q
n
80
130
200
ps
f
MAX
Maximum Input Frequency
LVTTL or LVCMOS
input
> 1
GHz
f
MAX
Maximum Input Frequency
(2)
750mV peak-to-peak
sine wave centered
around 1.5V
> 1
GHz
Notes:
1. Q and Qn outputs are loaded with 50 ohms to V
DD
-2 volts.
2. Measured using a 750mV peak-to-peak, 50% duty cycle clock source.
T73LVP20PI
TLSI Incorporated, 770 Park Avenue
,
Huntington NY 11743
(631) 755-7005
Fax 631-755-7626
www.tlsi.com
Page 3
Rev A February 23, 2004
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| T73LVP20-S08 | 3.3V LVTTL/LVCMOS-to-Differential LVPECL Translator |
| T73LVP20-S08-TNR | 3.3V LVTTL/LVCMOS-to-Differential LVPECL Translator |
| T73LVP20-SOT | 3.3V LVTTL/LVCMOS-to-Differential LVPECL Translator |
| T73LVP20-SOT-TNR | 3.3V LVTTL/LVCMOS-to-Differential LVPECL Translator |
| T73LVP22 | Dual 3.3V LVTTL/LVCMOS-to-Differential |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| T73LVP20-S08 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:3.3V LVTTL/LVCMOS-to-Differential LVPECL Translator |
| T73LVP20-S08-TNR | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:3.3V LVTTL/LVCMOS-to-Differential LVPECL Translator |
| T73LVP20-SOT | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:3.3V LVTTL/LVCMOS-to-Differential LVPECL Translator |
| T73LVP20-SOT-TNR | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:3.3V LVTTL/LVCMOS-to-Differential LVPECL Translator |
| T73LVP22 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Dual 3.3V LVTTL/LVCMOS-to-Differential |
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