
TE
CH
tm
DRAM
T221160A
Taiwan Memory Technology, Inc. reserves the right
P. 1
to change products or specifications without notice.
Publication Date: FEB. 2002
Revision:A
64K x 16 DYNAMIC RAM
FAST PAGE MODE
FEATURES
High speed access time : 25/30/35/40 ns
Industry-standard x 16 pinouts and timing
functions.
Single 5V (
±
10%) power supply.
All device pins are TTL- compatible.
256-cycle refresh in 4ms.
Refresh modes: RAS only, CAS BEFORE
RAS (CBR) and HIDDEN.
Conventional FAST PAGE MODE access cycle.
BYTE WRITE and BYTE READ access cycles.
PART NUMBER EXAMPLES
PART NUMBER
ACCESS TIME
PACKAGE
T221160A-30J
30ns
SOJ
T221160A-30S
30ns
35ns
35ns
TSOP-II
SOJ
TSOP-II
T221160A-35J
T221160A-35S
GENERAL DESCRIPTION
The T221160A is a randomly accessed solid state
memory containing 1,048,551 bits organized in a
x16 configuration. The T221160A has both BYTE
WRITE and WORD WRITE access cycles via two
CAS pins. It offers Fast Page mode operation
The T221160A CAS function and timing are
determined by the first CAS to transition low and
by the last to transition back high. Use only one of
the two CAS and leave the other staying high
during WRITE will result in a BYTE WRITE.
CASL transiting low in a WRITE cycle will write
data into the lower byte (IO1~IO8), and CASH
transiting low will write data into the upper byte
(IO9~16).
PIN ASSIGNMENT ( Top View )
I/01
Vcc
I/02
I/03
I/04
I/05
Vcc
I/06
I/07
I/08
NC
NC
NC
A0
A1
Vcc
A2
A3
WE
RAS
40
39
38
37
35
36
34
33
32
31
30
29
28
27
26
25
24
23
22
21
1
2
3
4
6
5
7
8
9
10
11
12
13
14
15
16
17
18
19
20
I/016
Vss
I/015
I/014
I/013
I/012
Vss
I/011
I/010
I/09
NC
NC
A7
A6
VSS
A5
A4
CASL
CASH
OE
SOJ
I/01
Vcc
I/02
I/03
I/04
I/05
Vcc
I/06
I/07
I/08
NC
NC
NC
A0
A1
Vcc
A2
A3
WE
RAS
40
39
38
37
35
36
34
33
32
31
30
29
28
27
26
25
24
23
22
21
1
2
3
4
6
5
7
8
9
10
11
12
13
14
15
16
17
18
19
20
I/016
Vss
I/015
I/014
I/013
I/012
Vss
I/011
I/010
I/09
NC
NC
A7
A6
VSS
A5
A4
CASL
CASH
OE
TSOP(II)